2320 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2100_pci_config()
2371 		WRT_REG_WORD(&reg->ctrl_status, 0x20);  in qla2300_pci_config()
2372 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2381 		WRT_REG_WORD(&reg->ctrl_status, 0x0);  in qla2300_pci_config()
2382 		RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2402 	ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);  in qla2300_pci_config()
2446 	ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);  in qla24xx_pci_config()
2564 		WRT_REG_WORD(&reg->ctrl_status, 0x20);  in qla2x00_reset_chip()
2565 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2578 		WRT_REG_WORD(&reg->ctrl_status, 0x10);  in qla2x00_reset_chip()
2579 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2597 		WRT_REG_WORD(&reg->ctrl_status, 0);  in qla2x00_reset_chip()
2598 		RD_REG_WORD(&reg->ctrl_status);		/* PCI Posting. */  in qla2x00_reset_chip()
2613 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_reset_chip()
2624 			if ((RD_REG_WORD(&reg->ctrl_status) &  in qla2x00_reset_chip()
2703 	WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);  in qla24xx_reset_risc()
2705 		if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)  in qla24xx_reset_risc()
2711 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))  in qla24xx_reset_risc()
2717 	    RD_REG_DWORD(&reg->ctrl_status),  in qla24xx_reset_risc()
2718 	    (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));  in qla24xx_reset_risc()
2720 	WRT_REG_DWORD(&reg->ctrl_status,  in qla24xx_reset_risc()
2746 	RD_REG_DWORD(&reg->ctrl_status);  in qla24xx_reset_risc()
2749 		if ((RD_REG_DWORD(&reg->ctrl_status) &  in qla24xx_reset_risc()
2755 	if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))  in qla24xx_reset_risc()
2761 	    RD_REG_DWORD(&reg->ctrl_status));  in qla24xx_reset_risc()
2952 	WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);  in qla2x00_chip_diag()
2959 	data = qla2x00_debounce_register(&reg->ctrl_status);  in qla2x00_chip_diag()
2962 		data = RD_REG_WORD(&reg->ctrl_status);  in qla2x00_chip_diag()
4485 		if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)  in qla2x00_nvram_config()