| /drivers/net/wireless/realtek/rtw88/ |
| D | fw.h | 109 #define SET_PKT_H2C_CATEGORY(h2c_pkt, value) \ argument
111 #define SET_PKT_H2C_CMD_ID(h2c_pkt, value) \ argument
113 #define SET_PKT_H2C_SUB_CMD_ID(h2c_pkt, value) \ argument
115 #define SET_PKT_H2C_TOTAL_LEN(h2c_pkt, value) \ argument
125 #define FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, value) \ argument
127 #define GENERAL_INFO_SET_FW_TX_BOUNDARY(h2c_pkt, value) \ argument
130 #define PHYDM_INFO_SET_REF_TYPE(h2c_pkt, value) \ argument
132 #define PHYDM_INFO_SET_RF_TYPE(h2c_pkt, value) \ argument
134 #define PHYDM_INFO_SET_CUT_VER(h2c_pkt, value) \ argument
136 #define PHYDM_INFO_SET_RX_ANT_STATUS(h2c_pkt, value) \ argument
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| D | tx.h | 12 #define SET_TX_DESC_TXPKTSIZE(txdesc, value) \ argument
14 #define SET_TX_DESC_OFFSET(txdesc, value) \ argument
16 #define SET_TX_DESC_PKT_OFFSET(txdesc, value) \ argument
18 #define SET_TX_DESC_QSEL(txdesc, value) \ argument
20 #define SET_TX_DESC_BMC(txdesc, value) \ argument
22 #define SET_TX_DESC_RATE_ID(txdesc, value) \ argument
24 #define SET_TX_DESC_DATARATE(txdesc, value) \ argument
26 #define SET_TX_DESC_DISDATAFB(txdesc, value) \ argument
28 #define SET_TX_DESC_USE_RATE(txdesc, value) \ argument
30 #define SET_TX_DESC_SEC_TYPE(txdesc, value) \ argument
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| /drivers/video/fbdev/riva/ |
| D | nvreg.h | 34 #define SetBF(mask,value) ((value) << (0?mask)) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
47 #define DEVICE_WRITE(device,reg,value) DEVICE_ACCESS(device,reg)=(value) argument
51 #define DEVICE_DEF(device,mask,value) \ argument
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
56 #define PDAC_Write(reg,value) DEVICE_WRITE(PDAC,reg,value) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
60 #define PDAC_Val(mask,value) DEVICE_VALUE(PDAC,mask,value) argument
63 #define PFB_Write(reg,value) DEVICE_WRITE(PFB,reg,value) argument
66 #define PFB_Def(mask,value) DEVICE_DEF(PFB,mask,value) argument
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| /drivers/net/ethernet/sfc/ |
| D | io.h | 79 static inline void _efx_writeq(struct efx_nic *efx, __le64 value, in _efx_writeq()
90 static inline void _efx_writed(struct efx_nic *efx, __le32 value, in _efx_writed()
101 static inline void efx_writeo(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo()
125 const efx_qword_t *value, unsigned int index) in efx_sram_writeq()
145 static inline void efx_writed(struct efx_nic *efx, const efx_dword_t *value, in efx_writed()
157 static inline void efx_reado(struct efx_nic *efx, efx_oword_t *value, in efx_reado()
176 efx_qword_t *value, unsigned int index) in efx_sram_readq()
196 static inline void efx_readd(struct efx_nic *efx, efx_dword_t *value, in efx_readd()
207 efx_writeo_table(struct efx_nic *efx, const efx_oword_t *value, in efx_writeo_table()
214 static inline void efx_reado_table(struct efx_nic *efx, efx_oword_t *value, in efx_reado_table()
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| /drivers/net/ethernet/sfc/falcon/ |
| D | io.h | 67 static inline void _ef4_writeq(struct ef4_nic *efx, __le64 value, in _ef4_writeq()
78 static inline void _ef4_writed(struct ef4_nic *efx, __le32 value, in _ef4_writed()
89 static inline void ef4_writeo(struct ef4_nic *efx, const ef4_oword_t *value, in ef4_writeo()
113 const ef4_qword_t *value, unsigned int index) in ef4_sram_writeq()
133 static inline void ef4_writed(struct ef4_nic *efx, const ef4_dword_t *value, in ef4_writed()
145 static inline void ef4_reado(struct ef4_nic *efx, ef4_oword_t *value, in ef4_reado()
164 ef4_qword_t *value, unsigned int index) in ef4_sram_readq()
184 static inline void ef4_readd(struct ef4_nic *efx, ef4_dword_t *value, in ef4_readd()
195 ef4_writeo_table(struct ef4_nic *efx, const ef4_oword_t *value, in ef4_writeo_table()
202 static inline void ef4_reado_table(struct ef4_nic *efx, ef4_oword_t *value, in ef4_reado_table()
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| /drivers/gpu/drm/meson/ |
| D | meson_overlay.c | 41 #define VD_X_START(value) FIELD_PREP(GENMASK(14, 0), value) argument
42 #define VD_X_END(value) FIELD_PREP(GENMASK(30, 16), value) argument
45 #define VD_Y_START(value) FIELD_PREP(GENMASK(12, 0), value) argument
46 #define VD_Y_END(value) FIELD_PREP(GENMASK(28, 16), value) argument
49 #define VD_COLOR_MAP(value) FIELD_PREP(GENMASK(1, 0), value) argument
52 #define VD_HORZ_Y_C_RATIO(value) FIELD_PREP(GENMASK(22, 21), value) argument
55 #define VD_VERT_INITIAL_PHASE(value) FIELD_PREP(GENMASK(11, 8), value) argument
56 #define VD_VERT_PHASE_STEP(value) FIELD_PREP(GENMASK(7, 1), value) argument
60 #define VD_H_END(value) FIELD_PREP(GENMASK(11, 0), value) argument
61 #define VD_H_START(value) FIELD_PREP(GENMASK(27, 16), value) argument
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| D | meson_plane.c | 41 #define VSC_BANK_LEN(value) FIELD_PREP(GENMASK(2, 0), value) argument
42 #define VSC_TOP_INI_RCV_NUM(value) FIELD_PREP(GENMASK(6, 3), value) argument
43 #define VSC_TOP_RPT_L0_NUM(value) FIELD_PREP(GENMASK(9, 8), value) argument
44 #define VSC_BOT_INI_RCV_NUM(value) FIELD_PREP(GENMASK(14, 11), value) argument
45 #define VSC_BOT_RPT_L0_NUM(value) FIELD_PREP(GENMASK(17, 16), value) argument
54 #define HSC_BANK_LENGTH(value) FIELD_PREP(GENMASK(2, 0), value) argument
55 #define HSC_INI_RCV_NUM0(value) FIELD_PREP(GENMASK(6, 3), value) argument
56 #define HSC_RPT_P0_NUM0(value) FIELD_PREP(GENMASK(9, 8), value) argument
61 #define SC_PHASE_STEP(value) FIELD_PREP(GENMASK(27, 0), value) argument
96 static inline int64_t fixed16_to_int(int64_t value) in fixed16_to_int()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_opp_csc_v.c | 127 uint32_t value = 0; in program_color_matrix_v() local
145 uint32_t value = 0; in program_color_matrix_v() local
163 uint32_t value = 0; in program_color_matrix_v() local
181 uint32_t value = 0; in program_color_matrix_v() local
199 uint32_t value = 0; in program_color_matrix_v() local
217 uint32_t value = 0; in program_color_matrix_v() local
241 uint32_t value = 0; in program_color_matrix_v() local
259 uint32_t value = 0; in program_color_matrix_v() local
277 uint32_t value = 0; in program_color_matrix_v() local
295 uint32_t value = 0; in program_color_matrix_v() local
[all …]
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| D | dce110_timing_generator.c | 95 uint32_t value = 0; in dce110_timing_generator_is_in_vertical_blank() local
128 uint32_t value = 0; in dce110_timing_generator_enable_crtc() local
157 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_program_blank_color() local
472 uint32_t value) in dce110_timing_generator_set_static_screen_control()
512 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_get_vblank_counter() local
532 uint32_t value; in dce110_timing_generator_get_position() local
575 uint32_t value = dm_read_reg(tg->ctx, in dce110_timing_generator_get_crtc_scanoutpos() local
610 uint32_t value = 0; in dce110_timing_generator_program_blanking() local
708 uint32_t value; in dce110_timing_generator_set_test_pattern() local
1218 uint32_t value; in dce110_timing_generator_setup_global_swap_lock() local
[all …]
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| D | dce110_timing_generator_v.c | 60 uint32_t value; in dce110_timing_generator_v_enable_crtc() local
83 uint32_t value; in dce110_timing_generator_v_disable_crtc() local
103 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc() local
123 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_unblank_crtc() local
144 uint32_t value = 0; in dce110_timing_generator_v_is_in_vertical_blank() local
155 uint32_t value; in dce110_timing_generator_v_is_counter_moving() local
255 uint32_t value = 0; in dce110_timing_generator_v_program_blanking() local
390 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_enable_advanced_request() local
456 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_program_blank_color() local
483 uint32_t value = 0; in dce110_timing_generator_v_set_overscan_color_black() local
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| D | dce110_opp_regamma_v.c | 39 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut() local
88 uint32_t value; in set_bypass_input_gamma() local
105 uint32_t value = 0; in configure_regamma_mode() local
136 uint32_t value = 0; in regamma_config_regions_and_segments() local
456 uint32_t value = 0; in program_pwl() local
523 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in dce110_opp_power_on_regamma_lut_v() local
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_core.c | 27 u32 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_core_init() local
63 u32 value = readl(ioaddr + GMAC_RXQ_CTRL0); in dwmac4_rx_queue_enable() local
79 u32 value; in dwmac4_rx_queue_priority() local
98 u32 value; in dwmac4_tx_queue_priority() local
117 u32 value; in dwmac4_rx_queue_routing() local
150 u32 value = readl(ioaddr + MTL_OPERATION_MODE); in dwmac4_prog_mtl_rx_algorithms() local
171 u32 value = readl(ioaddr + MTL_OPERATION_MODE); in dwmac4_prog_mtl_tx_algorithms() local
198 u32 value = readl(ioaddr + MTL_TXQX_WEIGHT_BASE_ADDR(queue)); in dwmac4_set_mtl_tx_queue_weight() local
208 u32 value; in dwmac4_map_mtl_dma() local
234 u32 value; in dwmac4_config_cbs() local
[all …]
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| D | dwxgmac2_dma.c | 13 u32 value = readl(ioaddr + XGMAC_DMA_MODE); in dwxgmac2_dma_reset() local
25 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_init() local
36 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan() local
50 u32 value; in dwxgmac2_dma_init_rx_chan() local
66 u32 value; in dwxgmac2_dma_init_tx_chan() local
80 u32 value = readl(ioaddr + XGMAC_DMA_SYSBUS_MODE); in dwxgmac2_dma_axi() local
142 u32 value = readl(ioaddr + XGMAC_MTL_RXQ_OPMODE(channel)); in dwxgmac2_dma_rx_mode() local
218 u32 value = readl(ioaddr + XGMAC_MTL_TXQ_OPMODE(channel)); in dwxgmac2_dma_tx_mode() local
270 u32 value; in dwxgmac2_dma_start_tx() local
283 u32 value; in dwxgmac2_dma_stop_tx() local
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| D | dwxgmac2_core.c | 69 u32 value; in dwxgmac2_rx_ipc() local
85 u32 value; in dwxgmac2_rx_queue_enable() local
99 u32 value, reg; in dwxgmac2_rx_queue_prio() local
116 u32 value, reg; in dwxgmac2_tx_queue_prio() local
133 u32 value; in dwxgmac2_prog_mtl_rx_algorithms() local
156 u32 value; in dwxgmac2_prog_mtl_tx_algorithms() local
201 u32 value, reg; in dwxgmac2_map_mtl_to_dma() local
219 u32 value; in dwxgmac2_config_cbs() local
308 u32 value = XGMAC_TFE; in dwxgmac2_flow_ctrl() local
340 u32 value; in dwxgmac2_set_umac_addr() local
[all …]
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| /drivers/gpu/drm/i915/gt/ |
| D | intel_mocs.c | 44 #define _LE_CACHEABILITY(value) ((value) << 0) argument
45 #define _LE_TGT_CACHE(value) ((value) << 2) argument
46 #define LE_LRUM(value) ((value) << 4) argument
47 #define LE_AOM(value) ((value) << 6) argument
48 #define LE_RSC(value) ((value) << 7) argument
49 #define LE_SCC(value) ((value) << 8) argument
50 #define LE_PFM(value) ((value) << 11) argument
51 #define LE_SCF(value) ((value) << 14) argument
52 #define LE_COS(value) ((value) << 15) argument
53 #define LE_SSE(value) ((value) << 17) argument
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| /drivers/usb/gadget/udc/ |
| D | fotg210-udc.c | 30 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); in fotg210_disable_fifo_int() local
41 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1); in fotg210_enable_fifo_int() local
52 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR); in fotg210_set_cxdone() local
176 u32 value; in fotg210_reset_tseq() local
256 u32 value; in fotg210_enable_dma() local
294 u32 value; in fotg210_wait_dma_done() local
386 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR0); in fotg210_ep0_queue() local
447 u32 value; in fotg210_set_epnstall() local
468 u32 value; in fotg210_clear_epnstall() local
479 static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge) in fotg210_set_halt_and_wedge()
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| /drivers/misc/habanalabs/goya/ |
| D | goya_hwmgr.c | 39 long value; in mme_clk_show() local
58 long value; in mme_clk_store() local
88 long value; in tpc_clk_show() local
107 long value; in tpc_clk_store() local
137 long value; in ic_clk_show() local
156 long value; in ic_clk_store() local
186 long value; in mme_clk_curr_show() local
203 long value; in tpc_clk_curr_show() local
220 long value; in ic_clk_curr_show() local
317 long value; in high_pll_store() local
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| /drivers/xen/xen-pciback/ |
| D | conf_space_header.c | 25 #define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO)) argument
26 #define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER) argument
50 static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) in command_read()
61 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data) in command_write()
136 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data) in rom_write()
170 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data) in bar_write()
207 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data) in bar_read()
268 u16 *value, void *data) in xen_pcibk_read_vendor()
276 u16 *value, void *data) in xen_pcibk_read_device()
283 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value, in interrupt_read()
[all …]
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| /drivers/media/pci/cx25821/ |
| D | cx25821-medusa-video.c | 24 u32 value = 0; in medusa_enable_bluefield_output() local
80 u32 value = 0; in medusa_initialize_ntsc() local
215 u32 value = 0, tmp = 0; in medusa_PALCombInit() local
247 u32 value = 0; in medusa_initialize_pal() local
386 u32 value = 0, tmp = 0; in medusa_set_videostandard() local
554 int value = 0; in medusa_set_brightness() local
575 int value = 0; in medusa_set_contrast() local
596 int value = 0; in medusa_set_hue() local
620 int value = 0; in medusa_set_saturation() local
650 u32 value = 0, tmp = 0; in medusa_video_init() local
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| /drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | dr_ste.c | 21 #define DR_STE_SET_VAL(lookup_type, tag, t_fname, spec, s_fname, value) do { \ argument
719 struct mlx5dr_match_param *value) in mlx5dr_ste_build_pre_check()
733 struct mlx5dr_match_param *value, in mlx5dr_ste_build_ste_arr()
773 static int dr_ste_build_eth_l2_src_des_bit_mask(struct mlx5dr_match_param *value, in dr_ste_build_eth_l2_src_des_bit_mask()
1053 static int dr_ste_build_eth_l2_src_des_tag(struct mlx5dr_match_param *value, in dr_ste_build_eth_l2_src_des_tag()
1119 static void dr_ste_build_eth_l3_ipv6_dst_bit_mask(struct mlx5dr_match_param *value, in dr_ste_build_eth_l3_ipv6_dst_bit_mask()
1130 static int dr_ste_build_eth_l3_ipv6_dst_tag(struct mlx5dr_match_param *value, in dr_ste_build_eth_l3_ipv6_dst_tag()
1159 static void dr_ste_build_eth_l3_ipv6_src_bit_mask(struct mlx5dr_match_param *value, in dr_ste_build_eth_l3_ipv6_src_bit_mask()
1170 static int dr_ste_build_eth_l3_ipv6_src_tag(struct mlx5dr_match_param *value, in dr_ste_build_eth_l3_ipv6_src_tag()
1199 static void dr_ste_build_eth_l3_ipv4_5_tuple_bit_mask(struct mlx5dr_match_param *value, in dr_ste_build_eth_l3_ipv4_5_tuple_bit_mask()
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| /drivers/leds/ |
| D | leds-fsg.c | 33 enum led_brightness value) in fsg_led_wlan_set()
45 enum led_brightness value) in fsg_led_wan_set()
57 enum led_brightness value) in fsg_led_sata_set()
69 enum led_brightness value) in fsg_led_usb_set()
81 enum led_brightness value) in fsg_led_sync_set()
93 enum led_brightness value) in fsg_led_ring_set()
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| /drivers/video/fbdev/nvidia/ |
| D | nv_setup.c | 60 void NVWriteCrtc(struct nvidia_par *par, u8 index, u8 value) in NVWriteCrtc()
70 void NVWriteGr(struct nvidia_par *par, u8 index, u8 value) in NVWriteGr()
80 void NVWriteSeq(struct nvidia_par *par, u8 index, u8 value) in NVWriteSeq()
90 void NVWriteAttr(struct nvidia_par *par, u8 index, u8 value) in NVWriteAttr()
114 void NVWriteMiscOut(struct nvidia_par *par, u8 value) in NVWriteMiscOut()
122 void NVWriteDacMask(struct nvidia_par *par, u8 value) in NVWriteDacMask()
126 void NVWriteDacReadAddr(struct nvidia_par *par, u8 value) in NVWriteDacReadAddr()
130 void NVWriteDacWriteAddr(struct nvidia_par *par, u8 value) in NVWriteDacWriteAddr()
134 void NVWriteDacData(struct nvidia_par *par, u8 value) in NVWriteDacData()
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| /drivers/media/usb/cx231xx/ |
| D | cx231xx-avcore.c | 65 u32 value = 0; in initGPIO() local
86 u8 value[4] = { 0, 0, 0, 0 }; in uninitGPIO() local
262 u8 value = 0; in cx231xx_afe_set_input_mux() local
616 u32 value = 0; in cx231xx_set_decoder_video_input() local
1100 u32 value = 0; in cx231xx_set_audio_decoder_input() local
1230 u32 value; in cx231xx_init_ctrl_pin_status() local
1263 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_enable_i2c_port_3() local
1320 u32 value = 0; in cx231xx_dump_HH_reg() local
1457 u8 value = 0; in cx231xx_Setup_AFE_for_LowIF() local
1516 u8 value[4] = { 0, 0, 0, 0 }; in cx231xx_set_Colibri_For_LowIF() local
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| /drivers/media/usb/dvb-usb/ |
| D | az6027.c | 299 u16 value, u16 index, u8 *b, int blen) in az6027_usb_in_op()
330 u16 value, in az6027_usb_out_op()
367 u16 value; in az6027_streaming_ctrl() local
414 u16 value; in az6027_ci_read_attribute_mem() local
449 u8 value) in az6027_ci_write_attribute_mem()
487 u16 value; in az6027_ci_read_cam_control() local
526 u8 value) in az6027_ci_write_cam_control()
563 u16 value; in CI_CamReady() local
595 u16 value; in az6027_ci_slot_reset() local
651 u16 value; in az6027_ci_slot_ts_enable() local
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| /drivers/acpi/pmic/ |
| D | tps68470_pmic.c | 218 int bitmask, u64 *value) in tps68470_pmic_get_power()
230 int bitmask, u64 *value) in tps68470_pmic_get_vr_val()
242 int bitmask, u64 *value) in tps68470_pmic_get_clk()
254 int bitmask, u64 *value) in tps68470_pmic_get_clk_freq()
266 int bitmask, u64 value) in ti_tps68470_regmap_update_bits()
273 u32 bits, u64 *value, in tps68470_pmic_common_handler()
309 u32 bits, u64 *value, in tps68470_pmic_cfreq_handler()
323 u64 *value, void *handler_context, in tps68470_pmic_clk_handler()
336 u32 bits, u64 *value, in tps68470_pmic_vrval_handler()
350 u32 bits, u64 *value, in tps68470_pmic_pwr_handler()
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