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| /Documentation/ABI/testing/ |
| D | sysfs-class-rapidio | 3 On-chip RapidIO controllers and PCIe-to-RapidIO bridges
14 KernelVersion: v3.15
19 0 = small (8-bit destination ID, max. 256 devices),
20 1 = large (16-bit destination ID, max. 65536 devices).
24 KernelVersion: v3.15
29 RapidIO mport device. If value 0xFFFFFFFF is returned this means
42 [rio@rapidio ~]$ ls /sys/class/rapidio_port/rapidio0/ -l
43 total 0
44 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
45 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
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| D | sysfs-devices-platform-stratix10-rsu | 3 What: /sys/devices/platform/stratix10-rsu.0/current_image
10 What: /sys/devices/platform/stratix10-rsu.0/fail_image
17 What: /sys/devices/platform/stratix10-rsu.0/state
26 b[15:0]
27 Currently used only when major error is 0xF006
34 0xF001 bitstream error
35 0xF002 hardware access failure
36 0xF003 bitstream corruption
37 0xF004 internal error
38 0xF005 device error
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| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
17 - The non-prefetchable and prefetchable memory windows must
18 each be exactly 256MB (0x10000000) in size.
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-lp3943.txt | 4 - compatible: "ti,lp3943-pwm"
5 - #pwm-cells: Should be 2. See pwm.txt in this directory for a
9 - ti,pwm0 or ti,pwm1: Output pin number(s) for PWM channel 0 or 1.
10 0 = output 0
14 15 = output 15
17 PWM 0 is for RGB LED brightness control
23 reg = <0x60>;
26 * PWM 0 : output 8, 9 and 10
27 * PWM 1 : output 15
30 compatible = "ti,lp3943-pwm";
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl-imx-sdma.txt | 4 - compatible : Should be one of
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx8mq-sdma"
13 The -to variants should be preferred since they allow to determine the
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos-srom.txt | 4 - compatible : Should contain "samsung,exynos4210-srom".
6 - reg: offset and length of the register set
12 - #address-cells: Must be set to 2 to allow device address translation.
15 - #size-cells: Must be set to 1 to allow device size passing
17 - ranges: Must be set up to reflect the memory layout with four integer values
19 <bank-number> 0 <parent address of bank> <size>
21 Sub-nodes:
27 - reg: bank number, base address (relative to start of the bank) and size of
29 typically 0 as this is the start of the bank.
31 - samsung,srom-timing : array of 6 integers, specifying bank timings in the
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 13 - compatible: Should be one of
14 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
16 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
18 - reg: Address and length of the register set for the device
19 - interrupts: Interrupt for the XADC control interface.
20 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
21 when using the AXI-XADC pcore this must be the clock that provides the
25 - xlnx,external-mux:
32 - xlnx,external-mux-channel: Configures which pair of pins is used to
35 0: VP/VN
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 2 -------------------
7 C64X+ core. Priority 0 and 1 are used for reset and NMI respectively.
8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
12 --------------------
13 - compatible: Should be "ti,c64x+core-pic";
14 - #interrupt-cells: <1>
17 ------------------------------
18 Single cell specifying the core interrupt priority level (4-15) where
19 4 is highest priority and 15 is lowest priority.
22 -------
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| /Documentation/devicetree/bindings/sound/ |
| D | max98373.txt | 7 - compatible : "maxim,max98373"
9 - reg : the I2C address of the device.
13 - maxim,vmon-slot-no : slot number used to send voltage information
16 slot range : 0 ~ 15, Default : 0
18 - maxim,imon-slot-no : slot number used to send current information
19 slot range : 0 ~ 15, Default : 0
21 - maxim,spkfb-slot-no : slot number used to send speaker feedback information
22 slot range : 0 ~ 15, Default : 0
24 - maxim,interleave-mode : For cases where a single combined channel
35 reg = <0x31>;
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| D | max9892x.txt | 7 - compatible : should be one of the following
8 - "maxim,max98925"
9 - "maxim,max98926"
10 - "maxim,max98927"
12 - vmon-slot-no : slot number used to send voltage information
15 MAX98925/MAX98926 slot range : 0 ~ 30, Default : 0
16 MAX98927 slot range : 0 ~ 15, Default : 0
18 - imon-slot-no : slot number used to send current information
19 MAX98925/MAX98926 slot range : 0 ~ 30, Default : 0
20 MAX98927 slot range : 0 ~ 15, Default : 0
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| /Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 12 -----------------------------------
13 0 Audio AC97 Cntrl
14 1 pex0_en PCIe 0 Clock out
17 4 ge0 Gigabit Ethernet 0
18 5 pex0 PCIe Cntrl 0
20 15 sata0 SATA Host 0
25 30 sata1 SATA Host 0
29 -----------------------------------
33 5 pex0 PCIe 0 Clock out
37 14 sata0_link SATA 0 Link
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| D | samsung,s2mps11.txt | 4 This is a part of device tree bindings for S2M and S5M family multi-function
6 More information can be found in bindings/mfd/sec-core.txt file.
8 The S2MPS11/13/15 and S5M8767 provide three(AP/CP/BT) buffered 32.768 kHz
12 main device node a sub-node named "clocks".
15 - Documentation/devicetree/bindings/clock/clock-bindings.txt
18 Required properties of the "clocks" sub-node:
19 - #clock-cells: should be 1.
20 - compatible: Should be one of: "samsung,s2mps11-clk", "samsung,s2mps13-clk",
21 "samsung,s2mps14-clk", "samsung,s5m8767-clk"
29 ----------------------------------------------------------
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | tda1997x.txt | 1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
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| /Documentation/core-api/ |
| D | packing.rst | 6 -----------------
10 One can memory-map a pointer to a carefully crafted struct over the hardware
23 were performed byte-by-byte. Also the code can easily get cluttered, and the
24 high-level idea might get lost among the many bit shifts required.
25 Many drivers take the bit-shifting approach and then attempt to reduce the
30 ------------
34 - Packing a CPU-usable number into a memory buffer (with hardware
36 - Unpacking a memory buffer (which has hardware constraints/quirks)
37 into a CPU-usable number.
48 The byte offsets in the packed buffer are always implicitly 0, 1, ... 7.
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| /Documentation/devicetree/bindings/mfd/ |
| D | mc13xxx.txt | 4 - compatible : Should be "fsl,mc13783" or "fsl,mc13892"
7 - fsl,mc13xxx-uses-adc : Indicate the ADC is being used
8 - fsl,mc13xxx-uses-codec : Indicate the Audio Codec is being used
9 - fsl,mc13xxx-uses-rtc : Indicate the RTC is being used
10 - fsl,mc13xxx-uses-touch : Indicate the touchscreen controller is being used
12 Sub-nodes:
13 - codec: Contain the Audio Codec node.
14 - adc-port: Contain PMIC SSI port number used for ADC.
15 - dac-port: Contain PMIC SSI port number used for DAC.
16 - leds : Contain the led nodes and initial register values in property
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| /Documentation/devicetree/bindings/arm/ |
| D | ste-nomadik.txt | 1 ST-Ericsson Nomadik Device Tree Bindings
4 that pertain to this particular board, such as board-specific GPIOs.
7 - Nomadik System and reset controller used for basic chip control, clock
9 - compatible: must be "stericsson,nomadik,src"
13 Nomadik NHK-15 board manufactured by ST Microelectronics:
17 compatible="st,nomadik-nhk-15";
23 compatible="calaosystems,usb-s8815";
25 Required node: usb-s8815
29 usb-s8815 {
30 ethernet-gpio {
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-pca955x.txt | 1 * NXP - pca955x LED driver
5 be input or output, and output pins can also be pulse-width controlled.
8 - compatible : should be one of :
13 - #address-cells: must be 1
14 - #size-cells: must be 0
15 - reg: I2C slave address. depends on the model.
18 - gpio-controller: allows pins to be used as GPIOs.
19 - #gpio-cells: must be 2.
20 - gpio-line-names: define the names of the GPIO lines
22 LED sub-node properties:
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
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| /Documentation/hwmon/ |
| D | fam15h_power.rst | 6 * AMD Family 15h Processors
16 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors
17 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 16h Processors
18 - AMD64 Architecture Programmer's Manual Volume 2: System Programming
23 -----------
33 of AMD Family 15h and 16h processors via TDP algorithm.
35 For AMD Family 15h and 16h processors the following power values can
55 On multi-node processors the calculated value is for the entire
57 attributes only for internal node0 of a multi-node processor.
95 N = value of CPUID Fn8000_0007_ECX[CpuPwrSampleTimeRatio[15:0]].
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| /Documentation/devicetree/bindings/spi/ |
| D | adi,axi-spi-engine.txt | 4 - compatible : Must be "adi,axi-spi-engine-1.00.a""
5 - reg : Physical base address and size of the register map.
6 - interrupts : Property with a value describing the interrupt
8 - clock-names : List of input clock names - "s_axi_aclk", "spi_clk"
9 - clocks : Clock phandles and specifiers (See clock bindings for
10 details on clock-names and clocks).
11 - #address-cells : Must be <1>
12 - #size-cells : Must be <0>
16 master. They follow the generic SPI bindings as outlined in spi-bus.txt.
21 compatible = "adi,axi-spi-engine-1.00.a";
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| /Documentation/devicetree/bindings/input/ |
| D | pxa27x-keypad.txt | 4 - compatible : should be "marvell,pxa27x-keypad"
5 - reg : Address and length of the register set for the device
6 - interrupts : The interrupt for the keypad controller
7 - marvell,debounce-interval : How long time the key will be
9 is debounce interval for direct key and bit[15:0] is debounce
13 Please refer to matrix-keymap.txt
16 - marvell,direct-key-count : How many direct keyes are used.
17 - marvell,direct-key-mask : The mask indicates which keyes
20 - marvell,direct-key-low-active : Direct key status register
24 - marvell,direct-key-map : It is a u16 array. Each item indicates
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| /Documentation/admin-guide/pm/ |
| D | intel_epb.rst | 1 .. SPDX-License-Identifier: GPL-2.0
13 .. kernel-doc:: arch/x86/kernel/cpu/intel_epb.c
25 Shows the current EPB value for the CPU in a sliding scale 0 - 15, where
26 a value of 0 corresponds to a hint preference for highest performance
27 and a value of 15 corresponds to the maximum energy savings.
30 written to, either with a number in the 0 - 15 sliding scale above, or
31 with one of the strings: "performance", "balance-performance", "normal",
32 "balance-power", "power" that represent values reflected by their
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| /Documentation/devicetree/bindings/usb/ |
| D | am33xx-usb.txt | 3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
32 - reg: offset and length of "USB Controller Registers", and offset and
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| /Documentation/devicetree/bindings/hwmon/ |
| D | aspeed-pwm-tacho.txt | 9 Required properties for pwm-tacho node:
10 - #address-cells : should be 1.
12 - #size-cells : should be 1.
14 - #cooling-cells: should be 2.
16 - reg : address and length of the register set for the device.
18 - pinctrl-names : a pinctrl state named "default" must be defined.
20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports.
22 - compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and
23 "aspeed,ast2500-pwm-tacho" for AST2500.
25 - clocks : phandle to clock provider with the clock number in the second cell
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| /Documentation/admin-guide/ |
| D | devices.txt | 1 0 Unnamed devices (e.g. non-device mounts)
2 0 = reserved as null device number
11 6 = /dev/core OBSOLETE - replaced by /proc/kcore
18 12 = /dev/oldmem OBSOLETE - replaced by /proc/vmcore
21 0 = /dev/ram0 First RAM disk
31 2 char Pseudo-TTY masters
32 0 = /dev/ptyp0 First PTY master
37 Pseudo-tty's are named as follows:
40 the 1st through 16th series of 16 pseudo-ttys each, and
44 These are the old-style (BSD) PTY devices; Unix98
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