Searched +full:0 +full:x2000 (Results 1 – 25 of 120) sorted by relevance
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| /Documentation/devicetree/bindings/devfreq/event/ |
| D | exynos-ppmu.txt | 25 reg = <0x106a0000 0x2000>;
31 reg = <0x106b0000 0x2000>;
37 reg = <0x106c0000 0x2000>;
43 reg = <0x112a0000 0x2000>;
51 reg = <0x116a0000 0x2000>;
115 reg = <0x10480000 0x2000>;
121 reg = <0x10490000 0x2000>;
127 reg = <0x104a0000 0x2000>;
133 reg = <0x104b0000 0x2000>;
139 reg = <0x104c0000 0x2000>;
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | cortina,gemini-ethernet.txt | 23 - port0: contains the resources for ethernet port 0
59 reg = <0x60000000 0x4000>, /* Global registers, queue */
60 <0x60004000 0x2000>, /* V-bit */
61 <0x60006000 0x2000>; /* A-bit */
67 gmac0: ethernet-port@0 {
69 reg = <0x60008000 0x2000>, /* Port 0 DMA/TOE */
70 <0x6000a000 0x2000>; /* Port 0 GMAC */
82 reg = <0x6000c000 0x2000>, /* Port 1 DMA/TOE */
83 <0x6000e000 0x2000>; /* Port 1 GMAC */
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| D | davinci_emac.txt | 32 reg = <0x220000 0x4000>;
33 ti,davinci-ctrl-reg-offset = <0x3000>;
34 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
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| D | nxp,lpc1850-dwmac.txt | 13 reg = <0x40010000 0x2000>;
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| /Documentation/devicetree/bindings/arm/omap/ |
| D | ctrl.txt | 41 reg = <0x2000 0x2000>;
44 ranges = <0 0x2000 0x2000>;
49 reg = <0x30 0x230>;
51 #size-cells = <0>;
55 pinctrl-single,function-mask = <0xff1f>;
60 reg = <0x270 0x330>;
66 #size-cells = <0>;
76 #clock-cells = <0>;
80 reg = <0x02d8>;
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl-mxs-dma.txt | 7 If a channel is empty/reserved, 0 should be filled in place.
21 reg = <0x80004000 0x2000>;
25 87 86 0 0>;
36 reg = <0x80024000 0x2000>;
37 interrupts = <78 79 66 0
56 reg = <0x8006a000 0x2000>;
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| /Documentation/devicetree/bindings/arm/socionext/ |
| D | cache-uniphier.txt | 29 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
30 <0x506c0000 0x400>;
32 cache-size = <0x80000>;
41 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
42 <0x506c0000 0x400>;
44 cache-size = <0x200000>;
53 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
54 <0x506c8000 0x400>;
56 cache-size = <0x400000>;
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| /Documentation/devicetree/bindings/pci/ |
| D | mvebu-pci.txt | 23 0x82000000 0 r MBUS_ID(0xf0, 0x01) r 0 s
32 registers area. This range entry translates the '0x82000000 0 r' PCI
33 address into the 'MBUS_ID(0xf0, 0x01) r' CPU address, which is part
34 of the internal register window (as identified by MBUS_ID(0xf0,
35 0x01)).
39 0x8t000000 s 0 MBUS_ID(w, a) 0 1 0
79 value is 0.
93 bus-range = <0x00 0xff>;
97 <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */
98 0x82000000 0 0x42000 MBUS_ID(0xf0, 0x01) 0x42000 0 0x00002000 /* Port 2.0 registers */
[all …]
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| D | axis,artpec6-pcie.txt | 28 reg = <0xf8050000 0x2000
29 0xf8040000 0x1000
30 0xc0000000 0x2000>;
36 ranges = <0x81000000 0 0 0xc0002000 0 0x00010000
38 0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;
40 bus-range = <0x00 0xff>;
44 interrupt-map-mask = <0 0 0 0x7>;
45 interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
46 <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
47 <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | amlogic,meson-pcie.txt | 40 reg = <0x0 0xf9800000 0x0 0x400000
41 0x0 0xff646000 0x0 0x2000
42 0x0 0xff644000 0x0 0x2000
43 0x0 0xf9f00000 0x0 0x100000>;
48 interrupt-map-mask = <0 0 0 0>;
49 interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
50 bus-range = <0x0 0xff>;
54 ranges = <0x82000000 0 0 0x0 0xf9c00000 0 0x00300000>;
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| /Documentation/devicetree/bindings/clock/ |
| D | imx23-clock.txt | 14 ref_xtal 0
61 reg = <0x80040000 0x2000>;
67 reg = <0x8006c000 0x2000>;
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| D | imx28-clock.txt | 14 ref_xtal 0
84 reg = <0x80040000 0x2000>;
90 reg = <0x8006a000 0x2000>;
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,gic-v3.yaml | 33 enum: [ 0, 1, 2 ]
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
52 range [0-15]. Extented SPI interrupts are in the range [0-1023].
53 Extended PPI interrupts are in the range [0-127].
56 bits[3:0] trigger type and level flags.
68 of 0 if present.
96 - multipleOf: 0x10000
97 exclusiveMinimum: 0
140 "^interrupt-partition-[0-9]+$":
[all …]
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| /Documentation/devicetree/bindings/mfd/ |
| D | mxs-lradc.txt | 27 reg = <0x80050000 0x2000>;
39 reg = <0x80050000 0x2000>;
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| /Documentation/devicetree/bindings/soc/ti/ |
| D | wkup_m3_ipc.txt | 40 reg = <0x210000 0x2000>;
43 ranges = <0 0x210000 0x2000>;
49 reg = <0x1324 0x24>;
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| /Documentation/devicetree/bindings/net/can/ |
| D | c_can.txt | 30 register and the CAN instance number (0 offset).
44 reg = <0x481d0000 0x2000>;
55 reg = <0x481d0000 0x2000>;
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| /Documentation/devicetree/bindings/rtc/ |
| D | sirf,prima2-sysrtc.txt | 11 reg = <0x2000 0x1000>;
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| /Documentation/devicetree/bindings/goldfish/ |
| D | pipe.txt | 15 reg = <ff018000 0x2000>;
16 interrupts = <0x12>;
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| /Documentation/devicetree/bindings/mtd/ |
| D | elm.txt | 12 elm: elm@0 {
14 reg = <0x48080000 0x2000>;
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| D | diskonchip.txt | 12 docg3: flash@0 {
14 reg = <0x0 0x2000>;
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| /Documentation/devicetree/bindings/power/reset/ |
| D | axxia-reset.txt | 14 reg = <0x20 0x10030000 0 0x2000>;
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| /Documentation/devicetree/bindings/pwm/ |
| D | mxs-pwm.txt | 14 reg = <0x80064000 0x2000>;
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| /Documentation/devicetree/bindings/nvmem/ |
| D | amlogic-meson-mx-efuse.txt | 17 efuse: nvmem@0 {
19 reg = <0x0 0x2000>;
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-dcp.txt | 16 reg = <0x80028000 0x2000>;
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| /Documentation/devicetree/bindings/usb/ |
| D | iproc-udc.txt | 19 reg = <0x664e0000 0x2000>;
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