Searched +full:0 +full:x3 (Results 1 – 25 of 82) sorted by relevance
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| /Documentation/input/devices/ |
| D | alps.rst | 32 E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
33 00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
45 The new ALPS touchpads have an E7 signature of 73-03-50 or 73-03-0A but
94 byte 0: 0 0 YSGN XSGN 1 M R L
95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0
109 byte 0: 1 0 0 0 1 x9 x8 x7
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
111 byte 2: 0 ? ? l r ? fin ges
112 byte 3: 0 ? ? ? ? y9 y8 y7
113 byte 4: 0 y6 y5 y4 y3 y2 y1 y0
[all …]
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| /Documentation/devicetree/bindings/dma/ |
| D | stm32-dma.txt | 25 reg = <0x40026400 0x400>;
52 0x0: no address increment between transfers
53 0x1: increment address between transfers
55 0x0: no address increment between transfers
56 0x1: increment address between transfers
58 0x0: offset size is linked to the peripheral bus width
59 0x1: offset size is fixed to 4 (32-bit alignment)
61 0x0: low
62 0x1: medium
63 0x2: high
[all …]
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| /Documentation/devicetree/bindings/mux/ |
| D | reg-mux.txt | 30 reg = <0x66>;
35 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
36 <0x54 0x07>; /* 1: reg 0x54, bits 2:0 */
43 mux-controls = <&mux 0>;
46 #size-cells = <0>;
48 mdio@0 {
49 reg = <0x0>;
51 #size-cells = <0>;
55 reg = <0x8>;
57 #size-cells = <0>;
[all …]
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| /Documentation/devicetree/bindings/pci/ |
| D | 83xx-512x-pci.txt | 12 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
14 /* IDSEL 0x0E -mini PCI */
15 0x7000 0x0 0x0 0x1 &ipic 18 0x8
16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
17 0x7000 0x0 0x0 0x3 &ipic 18 0x8
18 0x7000 0x0 0x0 0x4 &ipic 18 0x8
20 /* IDSEL 0x0F - PCI slot */
21 0x7800 0x0 0x0 0x1 &ipic 17 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
23 0x7800 0x0 0x0 0x3 &ipic 17 0x8
[all …]
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| D | xilinx-nwl-pcie.txt | 34 address. The value must be 0.
48 interrupts = <0 114 4>, <0 115 4>, <0 116 4>, <0 117 4>, <0 118 4>;
50 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
51 interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
52 <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
53 <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
54 <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
57 reg = <0x0 0xfd0e0000 0x0 0x1000>,
58 <0x0 0xfd480000 0x0 0x1000>,
59 <0x80 0x00000000 0x0 0x1000000>;
[all …]
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| /Documentation/devicetree/bindings/c6x/ |
| D | emifa.txt | 35 reg = <0x70000000 0x100>;
36 ranges = <0x2 0x0 0xa0000000 0x00000008
37 0x3 0x0 0xb0000000 0x00400000
38 0x4 0x0 0xc0000000 0x10000000
39 0x5 0x0 0xD0000000 0x10000000>;
43 ti,emifa-ce-config = <0x00240120
44 0x00240120
45 0x00240122
46 0x00240122>;
48 flash@3,0 {
[all …]
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| /Documentation/devicetree/bindings/rtc/ |
| D | google,goldfish-rtc.txt | 15 reg = <0x9020000 0x1000>;
16 interrupts = <0x3>;
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| D | brcm,brcmstb-waketimer.txt | 16 reg = <0xf0411580 0x14>;
17 interrupts = <0x3>;
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| /Documentation/devicetree/bindings/goldfish/ |
| D | battery.txt | 15 reg = <0x9020000 0x1000>;
16 interrupts = <0x3>;
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | ifc.txt | 37 reg = <0x0 0xffe1e000 0 0x2000>;
42 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
43 0x1 0x0 0x0 0xffa00000 0x00010000
44 0x3 0x0 0x0 0xffb00000 0x00020000>;
46 flash@0,0 {
50 reg = <0x0 0x0 0x2000000>;
54 partition@0 {
56 reg = <0x0 0x02000000>;
61 flash@1,0 {
65 reg = <0x1 0x0 0x10000>;
[all …]
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| /Documentation/powerpc/ |
| D | ptrace.rst | 44 #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1
45 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
46 #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
47 #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
48 #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
56 #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1
57 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
58 #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4
60 #define PPC_BREAKPOINT_MODE_EXACT 0x0
61 #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1
[all …]
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| /Documentation/devicetree/bindings/arm/mrvl/ |
| D | tauros2.txt | 8 CACHE_TAUROS2_PREFETCH_ON (1 << 0)
16 marvell,tauros2-cache-features = <0x3>;
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| /Documentation/devicetree/bindings/sound/ |
| D | cs35l33.txt | 22 0, then VBST = VP. If greater than 0, the boost voltage will be 3300mV with
31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms,
39 ADC data word. This property can be set as a value of 0 for bits 15 down
40 to 0, 6 for 21 down to 6, 7, for 22 down to 7, 8 for 23 down to 8.
54 LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory
64 0xF).
72 from 0 to 7 for delays of 5ms, 10ms, 50ms, 100ms, 200ms, 500ms, 1000ms.
80 The reference voltage starts at 3000mV with a value of 0x3 and is increased
85 tracking. This property can be set to values from 0 to 3 with rates of 128
90 using VPMON. This property can be set to values from 0 to 6 starting at
[all …]
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| D | qcom,msm8916-wcd-analog.txt | 61 reg = <0xf000 0x200>;
68 interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
69 <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
70 <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
71 <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
72 <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
73 <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
74 <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
75 <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
76 <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
[all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-iio-mpu6050 | 4 KernelVersion: 3.4.0
8 is a 3x3 unitary matrix. A typical mounting matrix would look like
9 [0, 1, 0; 1, 0, 0; 0, 0, -1]. Using this information, it would be
12 [1, 0, 0; 0, 1, 0; 0, 0, 1] means sensor chip and device are perfectly
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| D | sysfs-class-extcon | 45 HDMI=0
47 EAR_JACK=0
53 state number starting with 0x:
54 # echo 0xHEX > state
70 "x" (integer between 0 and 31) of an extcon device.
77 state of cable "x" (integer between 0 and 31) of an extcon
78 device. The state value is either 0 (detached) or 1
87 {0x3, 0x5, 0xC, 0x0}, then the output is:
89 0x3
90 0x5
[all …]
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| /Documentation/devicetree/bindings/iio/magnetometer/ |
| D | ak8975.txt | 12 - mount-matrix: an optional 3x3 mounting rotation matrix
18 reg = <0x0c>;
19 gpios = <&gpj0 7 0>;
22 "0", /* y0 */
24 "0", /* x1 */
26 "0", /* z1 */
28 "0", /* y2 */
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| D | ak8974.txt | 18 - mount-matrix: an optional 3x3 mounting rotation matrix
24 reg = <0x0f>;
27 interrupts = <0 IRQ_TYPE_EDGE_RISING>,
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| /Documentation/devicetree/bindings/net/ |
| D | apm-xgene-mdio.txt | 8 - #size-cells: Must be <0>.
21 #size-cells = <0>;
22 reg = <0x0 0x17020000 0x0 0xd100>;
23 clocks = <&menetclk 0>;
29 reg = <0x3>;
32 reg = <0x4>;
35 reg = <0x5>;
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| /Documentation/pcmcia/ |
| D | driver.rst | 12 prod_id_hash[0] prod_id_hash[1] prod_id_hash[2] prod_id_hash[3]" > \
15 All fields are passed in as hexadecimal values (no leading 0x).
27 echo "0x3 manf_id card_id 0 0 0 0 0 0 0" > \
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| /Documentation/devicetree/bindings/mailbox/ |
| D | xgene-slimpro-mailbox.txt | 14 - interrupts: 8 interrupts must be from 0 to 7, interrupt 0 define the
15 the interrupt for mailbox channel 0 and interrupt 1 for
25 reg = <0x0 0x10540000 0x0 0xa000>;
27 interrupts = <0x0 0x0 0x4>,
28 <0x0 0x1 0x4>,
29 <0x0 0x2 0x4>,
30 <0x0 0x3 0x4>,
31 <0x0 0x4 0x4>,
32 <0x0 0x5 0x4>,
33 <0x0 0x6 0x4>,
[all …]
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| /Documentation/devicetree/bindings/cpufreq/ |
| D | imx-cpufreq-dt.txt | 15 0: Consumer
27 /* grade >= 0, consumer only */
28 opp-supported-hw = <0xf>, <0x3>;
35 opp-supported-hw = <0xe>, <0x7>;
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| /Documentation/devicetree/bindings/iio/imu/ |
| D | inv_mpu6050.txt | 25 - mount-matrix: an optional 3x3 mounting rotation matrix
33 reg = <0x68>;
37 "0", /* y0 */
39 "0", /* x1 */
41 "0", /* z1 */
43 "0", /* y2 */
50 reg = <0x68>;
55 #size-cells = <0>;
58 reg = <0x0c>;
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| /Documentation/devicetree/bindings/media/ |
| D | st,stm32-dcmi.txt | 27 reg = <0x50050000 0x400>;
30 clocks = <&rcc 0 STM32F4_AHB2_CLOCK(DCMI)>;
33 pinctrl-0 = <&dcmi_pins>;
34 dmas = <&dma2 1 1 0x414 0x3>;
40 hsync-active = <0>;
41 vsync-active = <0>;
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| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-stp-xway.txt | 32 reg = <0xE100BB0 0x40>;
36 lantiq,shadow = <0xffff>;
37 lantiq,groups = <0x7>;
38 lantiq,dsl = <0x3>;
39 lantiq,phy1 = <0x7>;
40 lantiq,phy2 = <0x7>;
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