Searched full:15 (Results 1 – 25 of 529) sorted by relevance
12345678910>>...22
| /Documentation/ABI/testing/ |
| D | sysfs-class-rapidio | 14 KernelVersion: v3.15
24 KernelVersion: v3.15
44 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0001
45 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0004
46 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:e:0007
47 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0002
48 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0003
49 drwxr-xr-x 3 root root 0 Feb 11 15:10 00:s:0005
50 lrwxrwxrwx 1 root root 0 Feb 11 15:11 device -> ../../../0000:01:00.0
51 -r--r--r-- 1 root root 4096 Feb 11 15:11 port_destid
[all …]
|
| D | sysfs-devices-platform-stratix10-rsu | 26 b[15:0]
56 b[15:0]
102 b[15:0]
128 in b[15:0].
|
| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-lp3943.txt | 14 15 = output 15
27 * PWM 1 : output 15
33 ti,pwm1 = <15>;
|
| /Documentation/devicetree/bindings/pci/ |
| D | v3-v360epc-pci.txt | 58 0x4800 0 0 3 &pic 15 /* INT C on slot 9 is irq 15 */
62 0x5000 0 0 2 &pic 15 /* INT B on slot 10 is irq 15 */
66 0x5800 0 0 1 &pic 15 /* INT A on slot 11 is irq 15 */
74 0x6000 0 0 4 &pic 15 /* INT D on slot 12 is irq 15 */
|
| /Documentation/devicetree/bindings/dma/ |
| D | fsl-imx-sdma.txt | 44 15 DSP
95 fsl,fifo-depth = <15>;
105 fsl,sdma-event-remap = <0 15 1>, <0 16 1>;
109 - <0 15 1> means that the offset is 0, so GPR0 is the register of the
110 SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
111 Setting bit 15 to 1 selects SAI1_RX.
|
| /Documentation/devicetree/bindings/memory-controllers/ |
| D | exynos-srom.txt | 35 Tacp : Page mode access cycle at Page mode (0 - 15)
36 Tcah : Address holding time after CSn (0 - 15)
37 Tcoh : Chip selection hold on OEn (0 - 15)
39 Tcos : Chip selection set-up before OEn (0 - 15)
40 Tacs : Address set-up before CSn (0 - 15)
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 39 16: VAUXP[15]/VAUXN[15]
44 8: VAUXP[7]/VAUXN[7] - VAUXP[15]/VAUXN[15]
66 16: VAUXP[15]/VAUXN[15]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | ti,c64x+megamod-pic.txt | 8 Priority 2 and 3 are reserved. Priority 4-15 are used for interrupt
18 Single cell specifying the core interrupt priority level (4-15) where
19 4 is highest priority and 15 is lowest priority.
58 core priority 15. The value of each cell is the
80 interrupts = < 12 13 14 15 >;
94 interrupts = < 12 13 14 15 >;
|
| /Documentation/devicetree/bindings/clock/ |
| D | samsung,s2mps11.txt | 8 The S2MPS11/13/15 and S5M8767 provide three(AP/CP/BT) buffered 32.768 kHz
30 32KhzAP 0 S2MPS11/13/14/15, S5M8767
31 32KhzCP 1 S2MPS11/13/15, S5M8767
32 32KhzBT 2 S2MPS11/13/14/15, S5M8767
|
| D | mvebu-gated-clock.txt | 20 15 sata0 SATA Host 0
38 15 sata0_core SATA 0 Core
70 15 sata0 SATA 0
90 15 sata0 SATA 0
109 15 sata0 SATA Host 0
147 15 crypto CESA engine
168 15 sata1 SATA Host 1
|
| /Documentation/devicetree/bindings/sound/ |
| D | max98373.txt | 16 slot range : 0 ~ 15, Default : 0
19 slot range : 0 ~ 15, Default : 0
22 slot range : 0 ~ 15, Default : 0
|
| D | max9892x.txt | 16 MAX98927 slot range : 0 ~ 15, Default : 0
20 MAX98927 slot range : 0 ~ 15, Default : 0
|
| /Documentation/hwmon/ |
| D | fam15h_power.rst | 6 * AMD Family 15h Processors
16 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors
33 of AMD Family 15h and 16h processors via TDP algorithm.
35 For AMD Family 15h and 16h processors the following power values can
95 N = value of CPUID Fn8000_0007_ECX[CpuPwrSampleTimeRatio[15:0]].
|
| /Documentation/core-api/ |
| D | packing.rst | 57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
123 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
134 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
145 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | tda1997x.txt | 57 - VP[15:0] connected to IMX6 CSI_DATA[19:4] for 16bit YUV422
80 /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */
82 /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */
99 - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656
122 /* Y[11:8]<->VP[15:12]<->CSI_DATA[19:16] */
124 /* Y[7:4]<->VP[11:08]<->CSI_DATA[15:12] */
141 - VP[15:8] connected to IMX6 CSI_DATA[19:12] for 8bit BT656
164 /* YCbCr[11:8]<->VP[15:12]<->CSI_DATA[19:16] */
166 /* YCbCr[7:4]<->VP[11:08]<->CSI_DATA[15:12] */
|
| /Documentation/devicetree/bindings/mfd/ |
| D | mc13xxx.txt | 65 vrfdig : regulator VRFDIG (register 32, bit 15)
74 vrf2 : regulator VRF2 (register 33, bit 15)
81 pwgt1spi : regulator PWGT1SPI (register 34, bit 15)
95 vpll : regulator VPLL (register 32, bit 15)
100 vaudio : regulator VAUDIO (register 33, bit 15)
106 pwgt1spi : regulator PWGT1SPI (register 34, bit 15)
|
| /Documentation/devicetree/bindings/arm/ |
| D | ste-nomadik.txt | 13 Nomadik NHK-15 board manufactured by ST Microelectronics:
17 compatible="st,nomadik-nhk-15";
|
| /Documentation/admin-guide/pm/ |
| D | intel_epb.rst | 25 Shows the current EPB value for the CPU in a sliding scale 0 - 15, where
27 and a value of 15 corresponds to the maximum energy savings.
30 written to, either with a number in the 0 - 15 sliding scale above, or
|
| /Documentation/devicetree/bindings/leds/ |
| D | leds-pca955x.txt | 26 from 0 to 15 for the pca9552
62 gpio@15 {
63 reg = <15>;
|
| /Documentation/devicetree/bindings/spi/ |
| D | adi,axi-spi-engine.txt | 24 clocks = <&clkc 15 &clkc 15>;
|
| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 57 bus. Valid values are 0-15, default is 1
60 (in case of MASTER Request). Valid values are 0-15, default is 1
62 Valid values are 0-15, default is 1.
64 Valid values are 0-15, default is 4
66 Valid values are 0-15, default is 1
|
| /Documentation/devicetree/bindings/input/ |
| D | pxa27x-keypad.txt | 9 is debounce interval for direct key and bit[15:0] is debounce
29 linux key-code for rotary up. Bit[15:0] is the linux key-code
35 is for rotary 1, and Bit[15:0] is for rotary 0.
|
| D | ti,palmas-pwrbutton.txt | 23 Palmas variation capability. Valid values are 15, 100, 500 and 1000.
33 ti,palmas-pwron-debounce-milli-seconds = <15>;
|
| /Documentation/devicetree/bindings/hwmon/ |
| D | aspeed-pwm-tacho.txt | 46 integer value in the range 0 through 15, with 0 indicating
47 Fan tach channel 0 and 15 indicating Fan tach channel 15.
|
| /Documentation/devicetree/bindings/usb/ |
| D | am33xx-usb.txt | 61 endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29
62 for endpoints 1 … 15 on instance 1). The second number is 0 for RX and
64 - #dma-channels: should be set to 30 representing the 15 endpoints for
162 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
169 &cppi41dma 29 0 &cppi41dma 15 1
|
12345678910>>...22