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/Documentation/devicetree/bindings/eeprom/
Dat24.txt8 "atmel,24c00",
9 "atmel,24c01",
10 "atmel,24cs01",
11 "atmel,24c02",
12 "atmel,24cs02",
13 "atmel,24mac402",
14 "atmel,24mac602",
16 "atmel,24c04",
17 "atmel,24cs04",
18 "atmel,24c08",
[all …]
/Documentation/misc-devices/
Deeprom.rst28 24C01 1K 0x50 (shadows at 0x51 - 0x57)
29 24C01A 1K 0x50 - 0x57 (Typical device on DIMMs)
30 24C02 2K 0x50 - 0x57
31 24C04 4K 0x50, 0x52, 0x54, 0x56
33 24C08 8K 0x50, 0x54 (additional data at 0x51, 0x52,
35 24C16 16K 0x50 (additional data at 0x51 - 0x57)
42 Microchip 24AA52 2K 0x50 - 0x57, SW write protect at 0x30-37
60 24Cxx, and are listed above; however the numbering for these
67 DIMMS will typically contain a 24C01A or 24C02, or the 34C02 variants.
71 DDC Monitors may contain any device. Often a 24C01, which responds to all 8
[all …]
/Documentation/devicetree/bindings/misc/
Didt_89hpesx.txt23 - compatible: There are five EEPROM devices supported: 24c32, 24c64, 24c128,
24 24c256 and 24c512 differed by size.
39 compatible = "onsemi,24c64";
/Documentation/arm/sunxi/
Dclocks.rst8 Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
11 A: The 24MHz oscillator allows gating to save power. Indeed, if gated
18 24MHz 32kHz
29 24Mhz 32kHz
/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-hv_24x75 Provides access to the binary "24x7 catalog" provided by the
9 https://raw.githubusercontent.com/jmesmon/catalog-24x7/master/hv-24x7-catalog.h
22 Exposes the "version" field of the 24x7 catalog. This is also
Drtc-cdev10 format is a Gregorian calendar date and 24 hour wall clock
17 RTCs that support alarms. Can be set upto 24 hours in the
22 powerful interface, which can issue alarms beyond 24 hours and
/Documentation/devicetree/bindings/display/panel/
Dlvds.yaml44 - jeida-24
45 - vesa-24
62 - "jeida-24" - 24-bit data mapping compatible with the [DSIM] and [LDI]
74 - "vesa-24" - 24-bit data mapping compatible with the [VESA] specification.
Dmitsubishi,aa104xd12.yaml26 const: jeida-24
53 data-mapping = "jeida-24";
Dmitsubishi,aa121td01.yaml26 const: jeida-24
52 data-mapping = "jeida-24";
/Documentation/devicetree/bindings/display/bridge/
Dti,tfp410.txt25 - If bus-width is not defined then bus-width = 24 should be assumed for
27 bus-width = 24: 24 data lines are connected and single-edge mode
53 bus-width = <24>;
/Documentation/core-api/
Dpacking.rst57 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
73 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
86 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
108 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
123 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7
134 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 23 22 21 20 19 18 17 16 31 30 29 28 27 26 25 24
145 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
/Documentation/input/devices/
Dwalkera0701.rst96 24 bin+oct values + 1 bin value = 24*4+1 bits = 97 bits
104 One binary and octal value can be grouped to nibble. 24 nibbles + one binary
114 four channels. In nibbles 22 and 23 is a special magic number. Nibble 24 is
117 After last octal value for nibble 24 and next sync pulse one additional
/Documentation/devicetree/bindings/phy/
Drockchip-dp-phy.txt10 Required elements: "24m"
23 clock-names = "24m";
Duniphier-pcie-phy.txt28 clocks = <&sys_clk 24>;
29 resets = <&sys_rst 24>;
/Documentation/devicetree/bindings/clock/
Dcirrus,lochnagar.txt49 - ln-clk-24m : On board fixed clock.
52 - ln-usb-clk-24m : On board fixed clock.
66 - ln-clk-24m : 24576000 Hz
69 - ln-usb-clk-24m : 24576000 Hz
Darm-integrator.txt5 This is a configurable clock fed from a 24 MHz chrystal,
24 xtal24mhz: xtal24mhz@24M {
Dimx23-clock.txt38 clk32k_div 24
68 interrupts = <24 25 23>;
Dprima2-clock.txt39 dmac0 24
71 interrupts = <24>;
/Documentation/sound/cards/
Daudiophile-usb.rst47 * sample depth of 16 or 24 bits
61 * 24-bit/48kHz ==> 4 channels in + 2 channels out,
66 * 24-bit/96kHz ==> 2 channels in _or_ 2 channels out (half duplex only)
113 24bit-depth-mode and immediately after wants to switch to a 16bit-depth mode,
133 24-bits depth mode.
227 24-bit modes
234 - 24bits 48kHz mode with Di disabled
241 - 24bits 48kHz mode with Di enabled
249 - 24bits 96kHz mode
334 | 0 | 0 | 0 | Di|24B|96K|DTS|SET|
[all …]
/Documentation/scsi/
Dtcm_qla2xxx.txt19 echo 1 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host
22 echo 0 > /sys/kernel/config/target/qla2xxx/21:00:00:24:ff:27:8f:ae/tpgt_1/attrib/jam_host
/Documentation/devicetree/bindings/dma/
Dzxdma.txt22 dma-channels = <24>;
23 dma-requests = <24>;
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-stmfx.txt3 ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion.
38 - if all STMFX pins[24:0] are available (no other STMFX function in use), you
39 should use gpio-ranges = <&stmfx_pinctrl 0 0 24>;
57 gpio-ranges = <&stmfx_pinctrl 0 0 24>;
/Documentation/devicetree/bindings/rtc/
Disil,isl1208.txt28 connected to SoC gpio2 pin 24 and internal pull-up enabled in EVIN pin.
35 <&gpio2 24 IRQ_TYPE_EDGE_FALLING>;
/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,archs-idu-intc.txt14 Number N of the particular interrupt line of IDU corresponds to the line N+24
45 interrupts = <0>; /* upstream idu IRQ #24 */
/Documentation/media/uapi/v4l/
Dpixfmt-meta-vsp1-hgo.rst58 - [31:24]
83 * - 24
109 - [31:24]
134 - [31:24]
159 - [31:24]

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