| /Documentation/devicetree/bindings/regulator/ |
| D | twl-regulator.txt | 4 For twl6030 regulators/LDOs
6 - "ti,twl6030-vaux1" for VAUX1 LDO
7 - "ti,twl6030-vaux2" for VAUX2 LDO
8 - "ti,twl6030-vaux3" for VAUX3 LDO
9 - "ti,twl6030-vmmc" for VMMC LDO
10 - "ti,twl6030-vpp" for VPP LDO
11 - "ti,twl6030-vusim" for VUSIM LDO
12 - "ti,twl6030-vana" for VANA LDO
13 - "ti,twl6030-vcxio" for VCXIO LDO
14 - "ti,twl6030-vdac" for VDAC LDO
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| D | max8925-regulator.txt | 5 - SDV1 for SDV SDV1
6 - SDV2 for SDV SDV2
7 - SDV3 for SDV SDV3
8 - LDO1 for LDO LDO1
9 - LDO2 for LDO LDO2
10 - LDO3 for LDO LDO3
11 - LDO4 for LDO LDO4
12 - LDO5 for LDO LDO5
13 - LDO6 for LDO LDO6
14 - LDO7 for LDO LDO7
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| /Documentation/devicetree/bindings/serial/ |
| D | renesas,sci-serial.txt | 7 - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.
8 - "renesas,scif-r7s9210" for R7S9210 (RZ/A2) SCIF compatible UART.
9 - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
10 - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART.
11 - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART.
12 - "renesas,scifb-r8a7740" for R8A7740 (R-Mobile A1) SCIFB compatible UART.
13 - "renesas,scif-r8a7743" for R8A7743 (RZ/G1M) SCIF compatible UART.
14 - "renesas,scifa-r8a7743" for R8A7743 (RZ/G1M) SCIFA compatible UART.
15 - "renesas,scifb-r8a7743" for R8A7743 (RZ/G1M) SCIFB compatible UART.
16 - "renesas,hscif-r8a7743" for R8A7743 (RZ/G1M) HSCIF compatible UART.
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| D | mtk-uart.txt | 5 * "mediatek,mt2701-uart" for MT2701 compatible UARTS
6 * "mediatek,mt2712-uart" for MT2712 compatible UARTS
7 * "mediatek,mt6580-uart" for MT6580 compatible UARTS
8 * "mediatek,mt6582-uart" for MT6582 compatible UARTS
9 * "mediatek,mt6589-uart" for MT6589 compatible UARTS
10 * "mediatek,mt6755-uart" for MT6755 compatible UARTS
11 * "mediatek,mt6765-uart" for MT6765 compatible UARTS
12 * "mediatek,mt6779-uart" for MT6779 compatible UARTS
13 * "mediatek,mt6795-uart" for MT6795 compatible UARTS
14 * "mediatek,mt6797-uart" for MT6797 compatible UARTS
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| /Documentation/devicetree/bindings/timer/ |
| D | renesas,cmt.txt | 15 - "renesas,r8a73a4-cmt0" for the 32-bit CMT0 device included in r8a73a4.
16 - "renesas,r8a73a4-cmt1" for the 48-bit CMT1 device included in r8a73a4.
17 - "renesas,r8a7740-cmt0" for the 32-bit CMT0 device included in r8a7740.
18 - "renesas,r8a7740-cmt1" for the 48-bit CMT1 device included in r8a7740.
19 - "renesas,r8a7740-cmt2" for the 32-bit CMT2 device included in r8a7740.
20 - "renesas,r8a7740-cmt3" for the 32-bit CMT3 device included in r8a7740.
21 - "renesas,r8a7740-cmt4" for the 32-bit CMT4 device included in r8a7740.
22 - "renesas,r8a7743-cmt0" for the 32-bit CMT0 device included in r8a7743.
23 - "renesas,r8a7743-cmt1" for the 48-bit CMT1 device included in r8a7743.
24 - "renesas,r8a7744-cmt0" for the 32-bit CMT0 device included in r8a7744.
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| /Documentation/devicetree/bindings/arm/samsung/ |
| D | samsung-boards.txt | 5 - "samsung,aries" - for S5PV210-based Samsung Aries board.
6 - "samsung,fascinate4g" - for S5PV210-based Samsung Galaxy S Fascinate 4G (SGH-T959P) board.
7 - "samsung,galaxys" - for S5PV210-based Samsung Galaxy S (i9000) board.
8 - "samsung,artik5" - for Exynos3250-based Samsung ARTIK5 module.
9 - "samsung,artik5-eval" - for Exynos3250-based Samsung ARTIK5 eval board.
10 - "samsung,monk" - for Exynos3250-based Samsung Simband board.
11 - "samsung,rinato" - for Exynos3250-based Samsung Gear2 board.
12 - "samsung,smdkv310" - for Exynos4210-based Samsung SMDKV310 eval board.
13 - "samsung,trats" - for Exynos4210-based Tizen Reference board.
14 - "samsung,universal_c210" - for Exynos4210-based Samsung board.
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| /Documentation/devicetree/bindings/clock/ |
| D | sunxi.txt | 1 Device Tree Clock bindings for arch-sunxi
9 "allwinner,sun4i-a10-osc-clk" - for a gatable oscillator
10 "allwinner,sun4i-a10-pll1-clk" - for the main PLL clock and PLL4
11 "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31
12 "allwinner,sun8i-a23-pll1-clk" - for the main PLL clock on A23
13 "allwinner,sun4i-a10-pll3-clk" - for the video PLL clock on A10
14 "allwinner,sun9i-a80-pll4-clk" - for the peripheral PLLs on A80
15 "allwinner,sun4i-a10-pll5-clk" - for the PLL5 clock
16 "allwinner,sun4i-a10-pll6-clk" - for the PLL6 clock
17 "allwinner,sun6i-a31-pll6-clk" - for the PLL6 clock on A31
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| D | lpc1850-cgu.txt | 3 The CGU generates multiple independent clocks for the core and the
13 corresponds to one of the base clocks for the LPC18xx.
31 Shall contain a list of phandles for the external input
45 0 BASE_SAFE_CLK Base safe clock (always on) for WWDT
46 1 BASE_USB0_CLK Base clock for USB0
47 2 BASE_PERIPH_CLK Base clock for Cortex-M0SUB subsystem,
49 3 BASE_USB1_CLK Base clock for USB1
50 4 BASE_CPU_CLK System base clock for ARM Cortex-M core
52 5 BASE_SPIFI_CLK Base clock for SPIFI
53 6 BASE_SPI_CLK Base clock for SPI
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| /Documentation/media/dvb-drivers/ |
| D | contributors.rst | 11 Thanks go to the following people for patches and contributions:
15 - for the initial saa7146 driver and its recent overhaul
19 - for his work on the initial Linux DVB driver
24 - for their continuing work on the DVB driver
28 - for his contributions to the dvb-net driver
32 - for CyberLogin for Linux which allows logging onto EON
38 - for patching the cable card decoder driver
42 - for various fixes regarding tuning, OSD and CI stuff and his work on VDR
46 - for his AFC kernel thread
50 - for his LIRC infrared handler
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| /Documentation/devicetree/bindings/mfd/ |
| D | rk808.txt | 19 outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
28 - vcc1-supply: The input supply for DCDC_REG1
29 - vcc2-supply: The input supply for DCDC_REG2
30 - vcc3-supply: The input supply for DCDC_REG3
31 - vcc4-supply: The input supply for DCDC_REG4
32 - vcc5-supply: The input supply for LDO_REG1 and LDO_REG2
33 - vcc6-supply: The input supply for LDO_REG3
36 - vcc1-supply: The input supply for DCDC_REG1
37 - vcc2-supply: The input supply for DCDC_REG2
38 - vcc3-supply: The input supply for DCDC_REG3
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| /Documentation/devicetree/bindings/soc/rockchip/ |
| D | grf.txt | 4 is composed of many registers for system control.
7 - GRF, used for general non-secure system,
8 - SGRF, used for general secure system,
9 - PMUGRF, used for always on system
11 On RK3328 SoCs, the GRF adds a section for USB2PHYGRF,
16 - "rockchip,px30-grf", "syscon": for px30
17 - "rockchip,rk3036-grf", "syscon": for rk3036
18 - "rockchip,rk3066-grf", "syscon": for rk3066
19 - "rockchip,rk3188-grf", "syscon": for rk3188
20 - "rockchip,rk3228-grf", "syscon": for rk3228
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| D | power_domain.txt | 3 Rockchip processors include support for multiple power domains which can be
6 Required properties for power domain controller:
8 "rockchip,px30-power-controller" - for PX30 SoCs.
9 "rockchip,rk3036-power-controller" - for RK3036 SoCs.
10 "rockchip,rk3066-power-controller" - for RK3066 SoCs.
11 "rockchip,rk3128-power-controller" - for RK3128 SoCs.
12 "rockchip,rk3188-power-controller" - for RK3188 SoCs.
13 "rockchip,rk3228-power-controller" - for RK3228 SoCs.
14 "rockchip,rk3288-power-controller" - for RK3288 SoCs.
15 "rockchip,rk3328-power-controller" - for RK3328 SoCs.
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom-qmp-phy.txt | 4 QMP phy controller supports physical layer functionality for a number of
9 "qcom,ipq8074-qmp-pcie-phy" for PCIe phy on IPQ8074
10 "qcom,msm8996-qmp-pcie-phy" for 14nm PCIe phy on msm8996,
11 "qcom,msm8996-qmp-usb3-phy" for 14nm USB3 phy on msm8996,
12 "qcom,msm8998-qmp-usb3-phy" for USB3 QMP V3 phy on msm8998,
13 "qcom,msm8998-qmp-ufs-phy" for UFS QMP phy on msm8998,
14 "qcom,msm8998-qmp-pcie-phy" for PCIe QMP phy on msm8998,
15 "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845,
16 "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845,
17 "qcom,sdm845-qmp-ufs-phy" for UFS QMP phy on sdm845.
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | mediatek,sysirq.txt | 3 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
8 "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516
9 "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183
10 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173
11 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135
12 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
13 "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
14 "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623
15 "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629
16 "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
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| /Documentation/devicetree/bindings/net/wireless/ |
| D | qca,ath9k.txt | 3 This node provides properties for configuring the ath9k wireless device. The
8 - compatible: For PCI and PCIe devices this should be an identifier following
15 - 0023 for AR5416
16 - 0024 for AR5418
17 - 0027 for AR9160
18 - 0029 for AR9220 and AR9223
19 - 002a for AR9280 and AR9283
20 - 002b for AR9285
21 - 002c for AR2427
22 - 002d for AR9227
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| /Documentation/isdn/ |
| D | credits.rst | 13 For help getting into standard-kernel.
16 For X.25 implementation.
19 For contribution of man-pages, the imontty-tool and a perfect
23 For creating and maintaining the FAQ.
26 For creating the FAQ, and the leafsite HOWTO.
29 For contribution of the vbox answering machine.
32 For his Sync-PPP-code.
35 For adding 1TR6-support to the Teles-driver.
36 For the HiSax-driver.
39 For contributing the imon-tool
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| /Documentation/devicetree/bindings/reset/ |
| D | uniphier-reset.txt | 9 "socionext,uniphier-ld4-reset" - for LD4 SoC
10 "socionext,uniphier-pro4-reset" - for Pro4 SoC
11 "socionext,uniphier-sld8-reset" - for sLD8 SoC
12 "socionext,uniphier-pro5-reset" - for Pro5 SoC
13 "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC
14 "socionext,uniphier-ld11-reset" - for LD11 SoC
15 "socionext,uniphier-ld20-reset" - for LD20 SoC
16 "socionext,uniphier-pxs3-reset" - for PXs3 SoC
40 "socionext,uniphier-ld4-mio-reset" - for LD4 SoC
41 "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC
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| /Documentation/devicetree/bindings/usb/ |
| D | usb-xhci.txt | 6 - "generic-xhci" for generic XHCI device
7 - "marvell,armada3700-xhci" for Armada 37xx SoCs
8 - "marvell,armada-375-xhci" for Armada 375 SoCs
9 - "marvell,armada-380-xhci" for Armada 38x SoCs
10 - "renesas,xhci-r8a7743" for r8a7743 SoC
11 - "renesas,xhci-r8a7744" for r8a7744 SoC
12 - "renesas,xhci-r8a774a1" for r8a774a1 SoC
13 - "renesas,xhci-r8a774c0" for r8a774c0 SoC
14 - "renesas,xhci-r8a7790" for r8a7790 SoC
15 - "renesas,xhci-r8a7791" for r8a7791 SoC
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| D | gr-udc.txt | 1 USB Peripheral Controller driver for Aeroflex Gaisler GRUSBDC.
6 Note: In the ordinary environment for the core, a Leon SPARC system,
13 - reg : Address and length of the register set for the device
15 - interrupts : Interrupt numbers for this device. Either one interrupt number
16 for all interrupts, or one for status related interrupts, one for IN
17 endpoint related interrupts and one for OUT endpoint related interrupts.
21 - epobufsizes : Array of buffer sizes for OUT endpoints when they differ
23 number. If the property is present it typically contains one entry for
25 only for as many endpoints as the array contains.
27 - epibufsizes : Array of buffer sizes for IN endpoints when they differ
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| D | renesas,usbhs.txt | 6 - "renesas,usbhs-r8a7743" for r8a7743 (RZ/G1M) compatible device
7 - "renesas,usbhs-r8a7744" for r8a7744 (RZ/G1N) compatible device
8 - "renesas,usbhs-r8a7745" for r8a7745 (RZ/G1E) compatible device
9 - "renesas,usbhs-r8a77470" for r8a77470 (RZ/G1C) compatible device
10 - "renesas,usbhs-r8a774a1" for r8a774a1 (RZ/G2M) compatible device
11 - "renesas,usbhs-r8a774c0" for r8a774c0 (RZ/G2E) compatible device
12 - "renesas,usbhs-r8a7790" for r8a7790 (R-Car H2) compatible device
13 - "renesas,usbhs-r8a7791" for r8a7791 (R-Car M2-W) compatible device
14 - "renesas,usbhs-r8a7792" for r8a7792 (R-Car V2H) compatible device
15 - "renesas,usbhs-r8a7793" for r8a7793 (R-Car M2-N) compatible device
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| /Documentation/devicetree/bindings/pwm/ |
| D | renesas,pwm-rcar.txt | 5 - "renesas,pwm-r8a7743": for RZ/G1M
6 - "renesas,pwm-r8a7744": for RZ/G1N
7 - "renesas,pwm-r8a7745": for RZ/G1E
8 - "renesas,pwm-r8a774a1": for RZ/G2M
9 - "renesas,pwm-r8a774c0": for RZ/G2E
10 - "renesas,pwm-r8a7778": for R-Car M1A
11 - "renesas,pwm-r8a7779": for R-Car H1
12 - "renesas,pwm-r8a7790": for R-Car H2
13 - "renesas,pwm-r8a7791": for R-Car M2-W
14 - "renesas,pwm-r8a7794": for R-Car E2
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| /Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-host1x.txt | 6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
16 - clocks: Must contain one entry, for the module clock.
17 See ../clocks/clock-bindings.txt for details.
18 - resets: Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
32 - clocks: Must contain one entry, for the module clock.
33 See ../clocks/clock-bindings.txt for details.
34 - resets: Must contain an entry for each entry in reset-names.
35 See ../reset/reset.txt for details.
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| /Documentation/devicetree/bindings/sound/ |
| D | madera.txt | 3 This describes audio configuration bindings for these codecs.
5 See also the core bindings for the parent MFD driver:
8 and defines for values used in these bindings:
19 For CS47L35 one of the CS47L35_DMIC_REF_xxx values
20 For all other codecs one of the MADERA_DMIC_REF_xxx values
21 Also see the datasheet for a description of the INn_DMIC_SUP field.
23 - cirrus,inmode : A list of input mode settings for each input. A maximum of
25 For non-muxed inputs the first two cells for that input set the mode for
27 For muxed inputs the first two cells for that input set the mode of the
34 - cirrus,out-mono : Mono bit for each output, maximum of six cells if the
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| /Documentation/devicetree/bindings/iommu/ |
| D | renesas,ipmmu-vmsa.txt | 4 It provides address translation for bus masters outside of the CPU, each
13 - "renesas,ipmmu-r8a73a4" for the R8A73A4 (R-Mobile APE6) IPMMU.
14 - "renesas,ipmmu-r8a7743" for the R8A7743 (RZ/G1M) IPMMU.
15 - "renesas,ipmmu-r8a7744" for the R8A7744 (RZ/G1N) IPMMU.
16 - "renesas,ipmmu-r8a7745" for the R8A7745 (RZ/G1E) IPMMU.
17 - "renesas,ipmmu-r8a774a1" for the R8A774A1 (RZ/G2M) IPMMU.
18 - "renesas,ipmmu-r8a774c0" for the R8A774C0 (RZ/G2E) IPMMU.
19 - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU.
20 - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU.
21 - "renesas,ipmmu-r8a7793" for the R8A7793 (R-Car M2-N) IPMMU.
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| /Documentation/hwmon/ |
| D | lochnagar.rst | 12 Lochnagar 2 features built-in Current Monitor circuitry that allows for the
26 in0_input Measured voltage for DBVDD1 (milliVolts)
28 curr1_input Measured current for DBVDD1 (milliAmps)
30 power1_average Measured average power for DBVDD1 (microWatts)
33 in1_input Measured voltage for 1V8 DSP (milliVolts)
35 curr2_input Measured current for 1V8 DSP (milliAmps)
37 power2_average Measured average power for 1V8 DSP (microWatts)
40 in2_input Measured voltage for 1V8 CDC (milliVolts)
42 curr3_input Measured current for 1V8 CDC (milliAmps)
44 power3_average Measured average power for 1V8 CDC (microWatts)
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