Searched full:hardware (Results 1 – 25 of 1253) sorted by relevance
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-sprd-adi.txt | 5 framework for its hardware implementation is alike to SPI bus and its timing 9 48 hardware channels to access analog chip. For 2 software read/write channels, 10 users should set ADI registers to access analog chip. For hardware channels, 11 we can configure them to allow other hardware components to use it independently, 12 which means we can just link one analog chip address to one hardware channel, 13 then users can access the mapped analog chip address by this hardware channel 14 triggered by hardware components instead of ADI software channels. 16 Thus we introduce one property named "sprd,hw-channels" to configure hardware 17 channels, the first value specifies the hardware channel id which is used to 18 transfer data triggered by hardware automatically, and the second value specifies [all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6328.txt | 4 In these SoCs it's possible to control LEDs both as GPIOs or by hardware. 8 by hardware using this driver. 9 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and 10 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware 14 should be controlled by a hardware signal instead of the MODE register value, 15 with 0 meaning hardware control enabled and 1 hardware control disabled. This 16 is usually 1:1 for hardware to LED signals, but through the activity/link 18 explained later in brcm,link-signal-sources). Even if a LED is hardware 20 but you can't turn it off if the hardware decides to light it up. For this 21 reason, hardware controlled LEDs aren't registered as LED class devices. [all …]
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| /Documentation/devicetree/bindings/crypto/ |
| D | brcm,spu-crypto.txt | 1 The Broadcom Secure Processing Unit (SPU) hardware supports symmetric 2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware 7 brcm,spum-crypto - for devices with SPU-M hardware 8 brcm,spu2-crypto - for devices with SPU2 hardware 9 brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3 11 brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
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| /Documentation/process/ |
| D | embargoed-hardware-issues.rst | 1 Embargoed hardware issues 7 Hardware issues which result in security problems are a different category 11 Hardware issues like Meltdown, Spectre, L1TF etc. must be treated 14 hardware vendors and other parties. For some of the issues, software 23 The Linux kernel hardware security team is separate from the regular Linux 26 The team only handles the coordination of embargoed hardware security 32 The team can be contacted by email at <hardware-security@kernel.org>. This 41 While hardware security issues are often handled by the affected hardware 43 identified a potential hardware flaw. 45 Hardware security officers [all …]
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| /Documentation/driver-api/iio/ |
| D | hw-consumer.rst | 4 An IIO device can be directly connected to another device in hardware. In this 5 case the buffers between IIO provider and IIO consumer are handled by hardware. 11 * struct :c:type:`iio_hw_consumer` — Hardware consumer structure 12 * :c:func:`iio_hw_consumer_alloc` — Allocate IIO hardware consumer 13 * :c:func:`iio_hw_consumer_free` — Free IIO hardware consumer 14 * :c:func:`iio_hw_consumer_enable` — Enable IIO hardware consumer 15 * :c:func:`iio_hw_consumer_disable` — Disable IIO hardware consumer
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| /Documentation/ABI/testing/ |
| D | sysfs-class-led-trigger-pattern | 19 Specify a hardware pattern for the LED, for LED hardware that 21 to some preprogrammed hardware patterns. It deactivates any active 24 Since different LED hardware can have different semantics of 25 hardware patterns, each driver is expected to provide its own 26 description for the hardware patterns in their ABI documentation
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| D | sysfs-ptp | 7 features of PTP hardware clocks. 14 hardware clock registered into the PTP class driver 21 This file contains the name of the PTP hardware clock 32 This file contains the PTP hardware clock's maximum 41 alarms offer by the PTP hardware clock. 48 channels offered by the PTP hardware clock. 55 output channels offered by the PTP hardware clock. 62 offered by the PTP hardware clock. 69 pin offered by the PTP hardware clock. The file name 70 is the hardware dependent pin name. Reading from this [all …]
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| D | debugfs-pfo-nx-crypto | 33 - The total number of AES operations submitted to the hardware. 36 - The total number of bytes hashed by the hardware using SHA-256. 39 - The total number of SHA-256 operations submitted to the hardware. 42 - The total number of bytes hashed by the hardware using SHA-512. 45 - The total number of SHA-512 operations submitted to the hardware.
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| D | sysfs-class-led-driver-sc27xx | 5 Specify a hardware pattern for the SC27XX LED. For the SC27XX 7 hardware pattern, which is used to configure the rise time, 11 for the high stage. To be compatible with the hardware pattern 21 Thus the format of the hardware pattern values should be:
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| D | sysfs-class-switchtec | 18 Description: Component identifier as stored in the hardware (eg. PM8543) 27 Description: Component revision stored in the hardware (read only) 35 Description: Component vendor as stored in the hardware (eg. MICROSEM) 44 Description: Device version as stored in the hardware (read only) 76 Description: Product identifier as stored in the hardware (eg. PSX 48XG3) 85 Description: Product revision stored in the hardware (eg. RevB) 94 Description: Product vendor as stored in the hardware (eg. MICROSEM)
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| /Documentation/driver-api/usb/ |
| D | gadget.rst | 22 they're easy to port to new hardware. 36 - Minimalist, so it's easier to support new device controller hardware. 41 USB ``host`` hardware in a PC, workstation, or server. Linux users with 42 embedded systems are more likely to have USB peripheral hardware. To 43 distinguish drivers running inside such hardware from the more familiar 58 necessarily different (one side is a hardware-neutral master, the other 59 is a hardware-aware slave), the endpoint I/0 API used here should also 69 hardware). 75 to hardware, through registers, fifos, dma, irqs, and the like. The 77 endpoint hardware. That hardware is exposed through endpoint [all …]
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| D | writing_musb_glue_layer.rst | 35 hardware level. A couple of wiki pages by Texas Instruments and Analog 43 hardware sits at the lowest. The MUSB controller driver abstract the 44 MUSB controller hardware to the Linux USB stack:: 65 | MUSB Controller Hardware | 69 sitting in between the controller driver and the controller hardware. 97 goes through a few steps, basically allocating the controller hardware 256 * Set dyn_fifo to avoid reading EP config from hardware. 266 driver data of the MUSB controller hardware and pass it on to the MUSB 268 controller hardware responsible for sending/receiving the USB data. 287 PHY driver when the controller hardware itself is about to be released. [all …]
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| /Documentation/powerpc/ |
| D | ptrace.rst | 5 GDB intends to support the following hardware debug features of BookE 8 4 hardware breakpoints (IAC) 9 2 hardware watchpoints (read, write and read-write) (DAC) 10 2 value conditions for the hardware watchpoints (DVC) 21 Query for GDB to discover the hardware debug features. The main info to 22 be returned here is the minimum alignment for the hardware watchpoints. 24 an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid 28 GDB: this query will return the number of hardware breakpoints, hardware 52 Sets a hardware breakpoint or watchpoint, according to the provided structure:: 85 With this GDB can ask for all kinds of hardware breakpoints and watchpoints [all …]
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| /Documentation/networking/device_drivers/toshiba/ |
| D | spider_net.txt | 28 to receive data from the hardware. A "full" descriptor has data in it, 36 ring is handed off to the hardware, which sequentially fills in the 41 and "tail" pointers, managed by the OS, and a hardware current 43 currently being filled. When this descr is filled, the hardware 46 and everything in front of it should be "empty". If the hardware 50 The tail pointer tails or trails the hardware pointer. When the 51 hardware is ahead, the tail pointer will be pointing at a "full" 56 flowing, then the tail pointer can catch up to the hardware pointer. 64 dma-mapping it so as to make it visible to the hardware. The OS will 91 In the above, the hardware has filled in one descr, number 20. Both [all …]
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| /Documentation/networking/ |
| D | netdev-features.txt | 33 hardware or software. 78 This callback should not modify hardware nor driver state (should be 88 Hardware should be reconfigured to match passed feature set. The set 91 should update netdev->features to match resulting hardware state. 113 NETIF_F_TSO_ECN means that hardware can properly split packets with CWR bit 139 * LLTX driver (deprecated for hardware drivers) 145 own locking, don't use it for new (hardware) drivers. 176 This requests that the NIC enables Hardware GRO (generic receive offload). 177 Hardware GRO is basically the exact reverse of TSO, and is generally 178 stricter than Hardware LRO. A packet stream merged by Hardware GRO must [all …]
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| /Documentation/media/kapi/ |
| D | cec-core.rst | 7 hardware. It is designed to handle a multiple types of hardware (receivers, 35 The struct cec_adapter represents the CEC adapter hardware. It is created by 60 capabilities of the hardware and which parts are to be handled 123 hardware: 126 To enable/disable the hardware: 131 This callback enables or disables the CEC hardware. Enabling the CEC hardware 146 that not for us. Not all hardware supports this and this function is only 148 (some hardware may always be in 'monitor all' mode). 159 changes. Not all hardware supports this and this function is only called if 161 (some hardware may always be in 'monitor pin' mode). [all …]
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| D | dtv-core.rst | 10 implement the digital demux logic (either in software or in hardware); 15 the hardware responsible for tuning into a digital TV transponder or 20 commands the digital TV decoding hardware. The output of a demod is 24 On most hardware, the frontend drivers talk with the bridge driver using an
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| /Documentation/media/uapi/dvb/ |
| D | intro.rst | 79 following main hardware components: 82 Here the raw signal reaches the digital TV hardware from a satellite dish or 89 Conditional Access (CA) hardware like CI adapters and smartcard slots 90 The complete TS is passed through the CA hardware. Programs to which 96 Not every digital TV hardware provides conditional access hardware. 111 Modern hardware usually doesn't have a separate decoder hardware, as 113 adapter of the system or by a signal processing hardware embedded on 129 The Linux Digital TV API lets you control these hardware components through 132 control the MPEG2 decoder hardware, the frontend device the tuner and 134 and section filters of the hardware. If the hardware does not support [all …]
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| /Documentation/driver-api/ |
| D | ptp.rst | 4 PTP hardware clock infrastructure for Linux 11 ancillary features of PTP hardware clocks. 15 complete set of PTP hardware clock functionality. 28 PTP hardware clock kernel API 34 programming the clock hardware. The clock driver notifies the class 43 PTP hardware clock user space API 68 reentrant. Since most hardware implementations treat the time value 75 Supported hardware
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| /Documentation/networking/device_drivers/freescale/dpaa2/ |
| D | ethernet-driver.rst | 20 Unlike regular NICs, in the DPAA2 architecture there is no single hardware block 21 representing network interfaces; instead, several separate hardware resources 29 All hardware resources are allocated and configured through the Management 32 hardware resources, like queues, do not have a corresponding MC object and 57 . . . hardware 59 | MC hardware portals | 68 DPBPs represent hardware buffer pools. Packet I/O is performed in the context 70 hardware resources. 89 | | | | | hardware 91 | I/O hardware portals | [all …]
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| /Documentation/media/uapi/mediactl/ |
| D | media-controller-intro.rst | 16 cameras include microphones, video capture hardware can also output 20 Independent functions, even when implemented in the same hardware, can 30 complex and can't always be represented by a tree structure. Hardware 35 applications to access hardware parameters. As newer hardware expose an
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| /Documentation/media/uapi/v4l/ |
| D | selection-api-configuration.rst | 16 settings and hardware limits. 18 Video hardware can have various cropping, composing and scaling 48 according to hardware limitations. 62 The part of a buffer into which the image is inserted by the hardware is 68 adjustments according to hardware limitations. The application can 76 The part of a buffer that is modified by the hardware is given by 78 ``V4L2_SEL_TGT_COMPOSE`` plus all padding data modified by hardware 80 be changed by the hardware. The content of pixels that lie inside the 103 the area from which image date are processed by the hardware, is given 107 further adjust the requested size and/or position according to hardware [all …]
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| /Documentation/arm/samsung-s3c24xx/ |
| D | s3c2412.rst | 42 The UART hardware is similar to the S3C2440, and is supported by the 49 The NAND hardware is similar to the S3C2440, and is supported by the 56 The USB hardware is similar to the S3C2410, with extended clock source 77 The RTC hardware is similar to the S3C2410, and is supported by the 84 The watchdog hardware is the same as the S3C2410, and is supported by 96 The IIC hardware is the same as the S3C2410, and is supported by the
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| /Documentation/devicetree/bindings/serial/ |
| D | nvidia,tegra194-tcu.txt | 3 The TCU is a system for sharing a hardware UART instance among multiple 7 with the hardware implementing the TCU. 16 "rx" - Mailbox for receiving data from hardware UART 17 "tx" - Mailbox for transmitting data to hardware UART
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| /Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,saw2.txt | 4 Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable 5 power-controller that transitions a piece of hardware (like a processor or 10 Multiple revisions of the SAW hardware are supported using these Device Nodes. 13 data due the the differences in hardware capabilities. Hence the SoC name, the 14 version of the SAW hardware in that SoC and the distinction between cpu (big
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