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/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt1 Qualcomm Technologies, Inc. NVMEM CPUFreq and OPP bindings
5 the CPU frequencies subset and voltage value of each OPP varies based on
11 to provide the OPP framework with required information (existing HW bitmap).
12 This is used to determine the voltage and frequency value for each OPP of
13 operating-points-v2 table when it is parsed by the OPP framework.
44 In every OPP node:
45 - opp-supported-hw: A single 32 bit bitmap value, representing compatible HW.
145 opp-shared;
147 opp-307200000 {
148 opp-hz = /bits/ 64 <307200000>;
[all …]
Dopp.txt1 Generic OPP (Operating Performance Points) Bindings
10 This document contain multiple versions of OPP binding and only one of them
45 phandle to a OPP table in their DT node. The OPP core will use this phandle to
50 phandle is available, then the same OPP table will be used for all power domains
54 should be documented as Documentation/devicetree/bindings/power/<vendor>-opp.txt
57 * OPP Table Node
66 - OPP nodes: One or more OPP nodes describing voltage-current-frequency
68 reference an OPP.
71 - opp-shared: Indicates that device nodes using this OPP Table Node's phandle
74 but they share OPP tables.
[all …]
Dsun50i-nvmem-cpufreq.txt1 Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings
4 For some SoCs, the CPU frequency subset and voltage value of each OPP
8 reads the efuse value from the SoC to provide the OPP framework with
26 In every OPP node:
27 - opp-microvolt-<name>: Voltage in micro Volts.
29 matching opp-microvolt-<name> property.
30 [See: opp.txt]
89 opp-shared;
91 opp@480000000 {
93 opp-hz = /bits/ 64 <480000000>;
[all …]
Dti-omap5-opp-supply.txt1 Texas Instruments OMAP compatible OPP supply description
7 an OPP transitions.
11 to the vdd-supply and clk when making an OPP transition. By supplying two
12 regulators to the device that will undergo OPP transitions we can make use
13 of the multi regulator binding that is part of the OPP core described here [1]
16 [1] Documentation/devicetree/bindings/opp/opp.txt
23 Required Properties for opp-supply node:
25 "ti,omap-opp-supply" - basic OPP supply controlling VDD and VBB
26 "ti,omap5-opp-supply" - OMAP5+ optimized voltages in efuse(class0)VDD
28 "ti,omap5-core-opp-supply" - OMAP5+ optimized voltages in efuse(class0) VDD
[all …]
Dqcom-opp.txt1 Qualcomm OPP bindings to describe OPP nodes
4 described in Documentation/devicetree/bindings/opp/opp.txt
7 * OPP Table Node
13 * OPP Node
16 - qcom,opp-fuse-level: A positive value representing the fuse corner/level
17 associated with this OPP node. Sometimes several corners/levels shares
/Documentation/devicetree/bindings/cpufreq/
Dcpufreq-mediatek.txt13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp.txt
31 opp-shared;
33 opp-598000000 {
34 opp-hz = /bits/ 64 <598000000>;
35 opp-microvolt = <1050000>;
38 opp-747500000 {
39 opp-hz = /bits/ 64 <747500000>;
40 opp-microvolt = <1050000>;
43 opp-1040000000 {
44 opp-hz = /bits/ 64 <1040000000>;
[all …]
Dti-cpufreq.txt1 TI CPUFreq and OPP bindings
7 provide the OPP framework with supported hardware information. This is
9 when it is parsed by the OPP framework.
24 For each opp entry in 'operating-points-v2' table:
25 - opp-supported-hw: Two bitfields indicating:
26 1. Which revision of the SoC the OPP is supported by
27 2. Which eFuse bits indicate this OPP is available
30 matches, the OPP gets enabled.
57 cpu0_opp_table: opp-table {
62 * The three following nodes are marked with opp-suspend
[all …]
Dcpufreq-st.txt5 from the SoC, then supplies the OPP framework with 'prop' and 'supported
9 For more information about the expected DT format [See: ../opp/opp.txt].
18 - operating-points : [See: ../power/opp.txt]
40 - operating-points-v2 : [See ../power/opp.txt]
61 opp-supported-hw = <0x00000004 0xffffffff 0xffffffff>;
62 opp-hz = /bits/ 64 <1500000000>;
65 opp-microvolt-pcode0 = <1200000>;
66 opp-microvolt-pcode1 = <1200000>;
67 opp-microvolt-pcode2 = <1200000>;
68 opp-microvolt-pcode3 = <1200000>;
[all …]
Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
25 opp-1000000000 {
26 opp-hz = /bits/ 64 <1000000000>;
28 opp-supported-hw = <0xf>, <0x3>;
31 opp-1300000000 {
32 opp-hz = /bits/ 64 <1300000000>;
33 opp-microvolt = <1000000>;
[all …]
Dcpufreq-dt.txt14 - operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for
/Documentation/power/
Dopp.rst2 Operating Performance Points (OPP) Library
10 2. Initial OPP List Registration
11 3. OPP Search Functions
12 4. OPP Availability Control Functions
13 5. OPP Data Retrieval Functions
19 1.1 What is an Operating Performance Point (OPP)?
48 OPP library provides a set of helper functions to organize and query the OPP
49 information. The library is located in drivers/opp/ directory and the header
50 is located in include/linux/pm_opp.h. OPP library can be enabled by enabling
51 CONFIG_PM_OPP from power management menuconfig menu. OPP library depends on
[all …]
Dindex.rst17 opp
/Documentation/devicetree/bindings/power/
Dqcom,rpmpd.txt14 - operating-points-v2: Phandle to the OPP table for the Power domain.
16 and Documentation/devicetree/bindings/opp/opp.txt for more details
21 Example: rpmh power domain controller and OPP table
25 opp-level values specified in the OPP tables for RPMh power domains
34 rpmhpd_opp_table: opp-table {
38 opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
42 opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
46 opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
50 opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
54 opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
[all …]
Dpower_domain.txt43 - operating-points-v2 : Phandles to the OPP tables of power domains provided by
45 or all the power domains provided by the provider have identical OPP tables,
46 then this shall contain a single phandle. Refer to ../opp/opp.txt for more
147 - required-opps: This contains phandle to an OPP node in another device's OPP
149 OPP of a different device. It should not contain multiple phandles to the OPP
150 nodes in the same OPP table. This specifies the minimum required OPP of the
151 device(s), whose OPP's phandle is present in this property, for the
152 functioning of the current device at the current OPP (where this property is
156 - OPP table for domain provider that provides two domains.
158 domain0_opp_table: opp-table0 {
[all …]
/Documentation/devicetree/bindings/gpu/
Darm,mali-bifrost.yaml86 opp@533000000 {
87 opp-hz = /bits/ 64 <533000000>;
88 opp-microvolt = <1250000>;
90 opp@450000000 {
91 opp-hz = /bits/ 64 <450000000>;
92 opp-microvolt = <1150000>;
94 opp@400000000 {
95 opp-hz = /bits/ 64 <400000000>;
96 opp-microvolt = <1125000>;
98 opp@350000000 {
[all …]
Darm,mali-midgard.yaml138 opp@533000000 {
139 opp-hz = /bits/ 64 <533000000>;
140 opp-microvolt = <1250000>;
142 opp@450000000 {
143 opp-hz = /bits/ 64 <450000000>;
144 opp-microvolt = <1150000>;
146 opp@400000000 {
147 opp-hz = /bits/ 64 <400000000>;
148 opp-microvolt = <1125000>;
150 opp@350000000 {
[all …]
/Documentation/devicetree/bindings/devfreq/
Dexynos-bus.txt39 - operating-points-v2: the OPP table including frequency/voltage information
203 opp-shared;
205 opp-50000000 {
206 opp-hz = /bits/ 64 <50000000>;
207 opp-microvolt = <800000>;
209 opp-100000000 {
210 opp-hz = /bits/ 64 <100000000>;
211 opp-microvolt = <800000>;
213 opp-134000000 {
214 opp-hz = /bits/ 64 <134000000>;
[all …]
Drk3399_dmc.txt11 - operating-points-v2: Refer to Documentation/devicetree/bindings/opp/opp.txt
165 opp-hz = /bits/ 64 <300000000>;
166 opp-microvolt = <900000>;
169 opp-hz = /bits/ 64 <666000000>;
170 opp-microvolt = <900000>;
/Documentation/cpu-freq/
Dcore.txt25 3. CPUFreq Table Generation with Operating Performance Point (OPP)
88 3. CPUFreq Table Generation with Operating Performance Point (OPP)
90 For details about OPP, see Documentation/power/opp.rst
94 the OPP layer's internal information about the available frequencies
/Documentation/arm/omap/
Domap_pm.rst118 DSPBridge expresses target DSP performance levels in terms of OPP IDs.
137 Customizing OPP for platform
139 Defining CONFIG_PM should enable OPP layer for the silicon
140 and the registration of OPP table should take place automatically.
141 However, in special cases, the default OPP table may need to be
146 * Disable an unsupported OPP on the platform
147 * Define and add a custom opp table entry
/Documentation/scheduler/
Dsched-energy.rst161 The CPU capacity and power cost associated with each OPP is listed in
181 Current OPP: ===== Other OPP: - - - util_avg (100 each): ##
261 result in raising the OPP of the entire performance domain, and that will
265 which will keep running at a lower OPP. So, when considering the total energy
267 smaller than the cost of raising the OPP on the little CPUs for all the other
396 EAS tries to predict at which OPP will the CPUs be running in the close future
/Documentation/devicetree/bindings/display/msm/
Dgmu.txt32 - operating-points-v2: phandle to the OPP operating points
Dgpu.txt24 - operating-points-v2: optional phandle to the OPP operating points
/Documentation/driver-api/thermal/
Dcpu-cooling-api.rst64 the CPUs are registered using the kernel's opp library and the
/Documentation/devicetree/bindings/thermal/
Dthermal.txt205 * used as OPP indexes. The minimum cooling state is 0, which means