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/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
18 When referenced from panel device tree bindings the properties defined in this
19 document are defined as follows. The panel device tree bindings are
24 width-mm:
29 height-mm:
[all …]
Dilitek,ili9322.txt1 Ilitek ILI9322 TFT panel driver with SPI control bus
4 streams that get adapted and scaled to the panel. The panel output has
9 - compatible: "dlink,dir-685-panel", "ilitek,ili9322"
10 (full system-specific compatible is always required to look up configuration)
11 - reg: address of the panel on the SPI bus
14 - vcc-supply: core voltage supply, see regulator/regulator.txt
15 - iovcc-supply: voltage supply for the interface input/output signals,
17 - vci-supply: voltage supply for analog parts, see regulator/regulator.txt
18 - reset-gpios: a GPIO spec for the reset pin, see gpio/gpio.txt
23 - pixelclk-active: see display/panel/display-timing.txt
[all …]
Dlvds.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LVDS Display Panel
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
23 [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
[all …]
/Documentation/devicetree/bindings/display/
Dst,stm32-ltdc.txt1 * STMicroelectronics STM32 lcd-tft display controller
3 - ltdc: lcd-tft display controller host
5 - compatible: "st,stm32-ltdc"
6 - reg: Physical base address of the IP registers and length of memory mapped region.
7 - clocks: A list of phandle + clock-specifier pairs, one for each
8 entry in 'clock-names'.
9 - clock-names: A list of clock names. For ltdc it should contain:
10 - "lcd" for the clock feeding the output pixel clock & IP clock.
11 - resets: reset to be used by the device (defined by use of RCC macro).
13 - Video port for DPI RGB output: ltdc has one video port with up to 2
[all …]
/Documentation/media/v4l-drivers/
Ddavinci-vpbe.rst1 .. SPDX-License-Identifier: GPL-2.0
7 -----------------
28 -----------------------
49 board specific settings (specified in board-xxx-evm.c). This allows
52 API to set timings in VENC for a specific display resolution. As of this
59 at the port or LCD panel timings required. When external encoder/LCD panel
60 is connected, the timings for a specific standard/preset is retrieved from
61 the board specific table and the values are used to set the timings in
62 venc using non-standard timing mode.
64 Support LCD Panel displays using the VENC. For example to support a Logic
[all …]
/Documentation/devicetree/bindings/display/hisilicon/
Ddw-dsi.txt1 Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver
4 HDMI converter or panel.
7 - compatible: value should be "hisilicon,hi6220-dsi".
8 - reg: physical base address and length of dsi controller's registers.
9 - clocks: contains APB clock phandle + clock-specifier pair.
10 - clock-names: should be "pclk".
11 - ports: contains DSI controller input and output sub port.
13 The output port with the reg value "1", it could connect to panel or
17 A example of HiKey board hi6220 SoC and board specific DT entry:
20 SoC specific:
[all …]
/Documentation/devicetree/bindings/display/exynos/
Dexynos_dp.txt2 the type of panel connected to it.
5 -dp-controller node
6 -dptx-phy node(defined inside dp-controller node)
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10 -reg: deprecated
12 -samsung,enable-mask: deprecated
13 The bit-mask used to enable/disable DP PHY.
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
[all …]
Dexynos7-decon.txt1 Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
8 - compatible: value should be "samsung,exynos7-decon";
10 - reg: physical base address and length of the DECON registers set.
12 - interrupts: should contain a list of all DECON IP block interrupts in the
16 - interrupt-names: should contain the interrupt names: "fifo", "vsync",
20 - pinctrl-0: pin control group to be used for this controller.
22 - pinctrl-names: must contain a "default" entry.
24 - clocks: must include clock specifiers corresponding to entries in the
25 clock-names property.
27 - clock-names: list of clock names sorted in the same order as the clocks
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Dsamsung-fimd.txt1 Device-Tree bindings for Samsung SoC display controller (FIMD)
8 - compatible: value should be one of the following
9 "samsung,s3c2443-fimd"; /* for S3C24XX SoCs */
10 "samsung,s3c6400-fimd"; /* for S3C64XX SoCs */
11 "samsung,s5pv210-fimd"; /* for S5PV210 SoC */
12 "samsung,exynos3250-fimd"; /* for Exynos3250/3472 SoCs */
13 "samsung,exynos4210-fimd"; /* for Exynos4 SoCs */
14 "samsung,exynos5250-fimd"; /* for Exynos5250 SoCs */
15 "samsung,exynos5420-fimd"; /* for Exynos5420/5422/5800 SoCs */
17 - reg: physical base address and length of the FIMD registers set.
[all …]
Dexynos-mic.txt1 Device-Tree bindings for Samsung Exynos SoC mobile image compressor (MIC)
7 the panel PCB.
10 - compatible: value should be "samsung,exynos5433-mic".
11 - reg: physical base address and length of the MIC registers set and system
13 - clocks: must include clock specifiers corresponding to entries in the
14 clock-names property.
15 - clock-names: list of clock names sorted in the same order as the clocks
17 - samsung,disp-syscon: the reference node for syscon for DISP block.
18 - ports: contains a port which is connected to decon node and dsi node.
19 address-cells and size-cells must 1 and 0, respectively.
[all …]
/Documentation/fb/
Dsa1100fb.rst8 This is a driver for a graphic framebuffer for the SA-1100 LCD
20 16. LCCR values are display-specific and should be computed as
21 documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel
23 are used for the lower panel.
/Documentation/devicetree/bindings/display/rockchip/
Ddw_mipi_dsi_rockchip.txt1 Rockchip specific extensions to the Synopsys Designware MIPI DSI
5 - #address-cells: Should be <1>.
6 - #size-cells: Should be <0>.
7 - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi".
8 "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi".
9 - reg: Represent the physical address range of the controller.
10 - interrupts: Represent the controller's interrupt to the CPU(s).
11 - clocks, clock-names: Phandles to the controller's pll reference
14 - rockchip,grf: this soc should set GRF regs to mux vopl/vopb.
15 - ports: contain a port node with endpoint definitions as defined in [2].
[all …]
Danalogix_dp-rockchip.txt1 Rockchip RK3288 specific extensions to the Analogix Display Port
5 - compatible: "rockchip,rk3288-dp",
6 "rockchip,rk3399-edp";
8 - reg: physical base address of the controller and length
10 - clocks: from common clock binding: handle to dp clock.
13 - clock-names: from common clock binding:
16 - resets: Must contain an entry for each entry in reset-names.
19 - pinctrl-names: Names corresponding to the chip hotplug pinctrl states.
20 - pinctrl-0: pin-control mode. should be <&edp_hpd>
22 - reset-names: Must include the name "dp"
[all …]
/Documentation/devicetree/bindings/display/bridge/
Ddw_mipi_dsi.txt6 by itself but is meant to be referenced by platform-specific device tree
13 - reg: Memory mapped base address and length of the DesignWare MIPI DSI
16 - clocks: References to all the clocks specified in the clock-names property
19 - clock-names:
20 - "pclk" is the peripheral clock for either AHB and APB. (mandatory)
21 - "px_clk" is the pixel clock for the DPI/RGB input. (optional)
23 - resets: References to all the resets specified in the reset-names property
26 - reset-names: string reset name, must be "apb" if used. (optional)
28 - panel or bridge node: see [3]. (mandatory)
30 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[all …]
Dlvds-transmitter.txt2 ------------------------
7 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
12 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
16 [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
19 Those devices have been marketed under the FPD-Link and FlatLink brand names
25 - compatible: Must be "lvds-encoder"
28 properties not listed here, must list a device specific compatible first
36 - Video port 0 for parallel input
37 - Video port 1 for LVDS output
41 -------
[all …]
/Documentation/admin-guide/
Dindex.rst4 The following is a collection of user-oriented documents that have been
17 kernel-parameters
26 hw-vuln/index
34 reporting-bugs
35 security-bugs
36 bug-hunting
37 bug-bisect
38 tainted-kernels
40 dynamic-debug-howto
52 sysfs-rules
[all …]
/Documentation/driver-api/
Dipmb.rst14 the front panel interface, monitoring the baseboard,
15 hot-swapping disk drivers in the system chassis, etc...
27 ----------------------------
29 ipmb-dev-int - This is the driver needed on a Satellite MC to
43 --------------------
55 Name (_HID, "<Vendor-Specific HID>") // Vendor-Specific HID
72 compatible = "ipmb-dev";
79 modprobe ipmb-dev-int
83 ----------------------
86 described in 'Documentation/i2c/instantiating-devices.rst'.
[all …]
/Documentation/networking/dsa/
Ddsa.rst22 An Ethernet switch is typically comprised of multiple front-panel ports, and one
27 gateways, or even top-of-the rack switches. This host Ethernet controller will
32 using upstream and downstream Ethernet links between switches. These specific
36 For each front-panel port, DSA will create specialized network devices which are
37 used as controlling and data-flowing endpoints for use by the Linux networking
42 which is a hardware feature making the switch insert a specific tag for each
43 Ethernet frames it received to/from specific ports to help the management
46 - what port is this frame coming from
47 - what was the reason why this frame got forwarded
48 - how to send CPU originated traffic to specific ports
[all …]
/Documentation/media/uapi/v4l/
Dopen.rst4 .. Foundation, with no Invariant Sections, no Front-Cover Texts
5 .. and no Back-Cover Texts. A copy of the license is included at
6 .. Documentation/media/uapi/fdl-appendix.rst.
8 .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections
34 options to select specific video/radio/vbi node numbers. This allows the
40 .. code-block:: none
84 :ref:`read() <func-read>`/\ :ref:`write() <func-write>` API.
98 `v4l-utils <http://git.linuxtv.org/cgit.cgi/v4l-utils.git/>`__ git
100 towards both Media Controller-based devices and devices that do not use
102 linux-media mailing list:
[all …]
Dextended-controls.rst4 .. Foundation, with no Invariant Sections, no Front-Cover Texts
5 .. and no Back-Cover Texts. A copy of the license is included at
6 .. Documentation/media/uapi/fdl-appendix.rst.
8 .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections
10 .. _extended-controls:
29 relating to how the video is encoded into an MPEG stream are specific to
78 it also allows for 64-bit values and pointers to be passed.
82 such as N-dimensional arrays and/or structures. You need to specify the
90 particular, this ioctl gives the dimensions of the N-dimensional array if
117 .. code-block:: c
[all …]
Dcontrol.rst4 .. Foundation, with no Invariant Sections, no Front-Cover Texts
5 .. and no Back-Cover Texts. A copy of the license is included at
6 .. Documentation/media/uapi/fdl-appendix.rst.
8 .. TODO: replace it to GFDL-1.1-or-later WITH no-invariant-sections
16 Devices typically have a number of user-settable controls such as
26 for specific purposes. Drivers can also implement their own custom
28 pre-defined control IDs have the prefix ``V4L2_CID_``, and are listed in
29 :ref:`control-id`. The ID is used when querying the attributes of a
34 the user is supposed to understand. When the purpose is non-intuitive
35 the driver writer should provide a user manual, a user interface plug-in
[all …]
/Documentation/arm/omap/
Ddss.rst7 TV-out and multiple display support, but there are lots of small improvements
10 The DSS2 driver (omapdss module) is in arch/arm/plat-omap/dss/, and the FB,
11 panel and controller drivers are in drivers/video/omap2/. DSS1 and DSS2 live
15 --------
19 - MIPI DPI (parallel) output
20 - MIPI DSI output in command mode
21 - MIPI DBI (RFBI) output
22 - SDI output
23 - TV output
24 - All pieces can be compiled as a module or inside kernel
[all …]
/Documentation/gpu/
Dtegra.rst11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
45 the subsystem specific bits are torn down and the clients destroyed in turn.
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
52 .. kernel-doc:: drivers/gpu/host1x/bus.c
56 --------------------------
[all …]
Ddrm-internals.rst40 ------------------
54 DRM_IOCTL_SET_VERSION to select a specific version of the API. If the
79 -----------------------------------
81 .. kernel-doc:: drivers/gpu/drm/drm_drv.c
84 .. kernel-doc:: include/drm/drm_device.h
87 .. kernel-doc:: include/drm/drm_drv.h
90 .. kernel-doc:: drivers/gpu/drm/drm_drv.c
94 -----------
99 .. kernel-doc:: drivers/gpu/drm/drm_drv.c
105 .. kernel-doc:: drivers/gpu/drm/drm_irq.c
[all …]
Di915.rst17 ------------------------
19 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
22 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
25 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
29 ------------------
31 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
34 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
37 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
40 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
43 Intel GVT-g Guest Support(vGPU)
[all …]

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