Searched full:processors (Results 1 – 25 of 161) sorted by relevance
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| /Documentation/arm/ |
| D | marvel.rst | 41 … - Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
44 … - Product Brief : http://www.marvell.com/embedded-processors/armada-300/assets/armada_310.pdf
47 … - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6190-003_WEB.pdf
48 …- Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSourc…
49 …- Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_O…
52 … - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6192-003_ver1.pdf
53 …- Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F619x_OpenSourc…
54 …- Functional Spec: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_O…
58 … - Product Brief : http://www.marvell.com/embedded-processors/kirkwood/assets/88F6180-003_ver1.pdf
59 …- Hardware Spec : http://www.marvell.com/embedded-processors/kirkwood/assets/HW_88F6180_OpenSourc…
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| /Documentation/hwmon/ |
| D | k10temp.rst | 6 * AMD Family 10h processors:
16 * AMD Family 11h processors:
20 * AMD Family 12h processors: "Llano" (E2/A4/A6/A8-Series)
22 * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series)
24 * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri",
27 * AMD Family 16h processors: "Kabini", "Mullins"
29 * AMD Family 17h processors: "Zen", "Zen 2"
31 * AMD Family 18h processors: "Hygon Dhyana"
33 * AMD Family 19h processors: "Zen 3"
41 BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors:
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| D | coretemp.rst | 70 22nm Core i5/i7 Processors
81 32nm Core i3/i5/i7 Processors
88 32nm Core i7 Extreme Processors
91 32nm Celeron Processors
95 32nm Atom Processors
103 45nm Xeon Processors 5400 Quad-Core
109 45nm Xeon Processors 5200 Dual-Core
116 45nm Atom Processors
134 45nm Core2 Processors
145 45nm Core2 Quad Processors
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| D | fam15h_power.rst | 6 * AMD Family 15h Processors
8 * AMD Family 16h Processors
16 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors
17 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 16h Processors
33 of AMD Family 15h and 16h processors via TDP algorithm.
35 For AMD Family 15h and 16h processors the following power values can
55 On multi-node processors the calculated value is for the entire
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| /Documentation/cpu-freq/ |
| D | amd-powernow.txt | 3 management capabilities in AMD processors. As the hardware
4 implementation changes in new generations of the processors,
12 is not available in all processors. The drivers will refuse
13 to load on processors without this capability. The capability
26 Documentation on this functionality in 8th generation processors
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| /Documentation/ |
| D | io-mapping.txt | 10 usage is to support the large graphics aperture on 32-bit processors where
84 On 64-bit processors, io_mapping_create_wc calls ioremap_wc for the whole
89 On 32-bit processors with HIGHMEM defined, io_mapping_map_atomic_wc uses
94 On 32-bit processors without HIGHMEM defined, io_mapping_map_atomic_wc and
96 performs an IPI to inform all processors about the new mapping. This results
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| D | rpmsg.txt | 24 Typically AMP remote processors employ dedicated DSP codecs and multimedia
28 These remote processors could also be used to control latency-sensitive
32 Users of those remote processors can either be userland apps (e.g. multimedia
38 with remote processors available on the system. In turn, drivers could then
42 keep in mind that remote processors might have direct access to the
46 devices, hwspinlocks, etc..). Moreover, those remote processors might be
326 This is possible only with remote processors that have the VIRTIO_RPMSG_F_NS
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | intel,ixp4xx-interrupt.yaml | 8 title: Intel IXP4xx XScale Networking Processors Interrupt Controller
14 This interrupt controller is found in the Intel IXP4xx processors.
15 Some processors have 32 interrupts, some have up to 64 interrupts.
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| D | csky,mpintc.txt | 2 C-SKY Multi-processors Interrupt Controller
5 C-SKY Multi-processors Interrupt Controller is designed for ck807/ck810/ck860
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| /Documentation/powerpc/ |
| D | ptrace.rst | 6 processors:
14 that's extendable and that covers both BookE and server processors, so
23 BookE processors don't have restrictions here, but server processors have
86 that the BookE supports. COMEFROM breakpoints available in server processors
136 - set a watchpoint in server processors (BookS)::
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| D | cpu_features.rst | 17 Detection of the feature set is simple. A list of processors can be found in
33 processors will not work (but such a system would likely have other problems
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| /Documentation/devicetree/bindings/hwlock/ |
| D | qcom-hwspinlock.txt | 3 The hardware block provides mutexes utilized between different processors on
4 the SoC as part of the communication protocol used by these processors.
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| /Documentation/devicetree/bindings/arm/keystone/ |
| D | ti,sci.txt | 4 Texas Instrument's processors including those belonging to Keystone generation
5 of processors have separate hardware entity which is now responsible for the
12 on multiple processors including ones running Linux.
14 See http://processors.wiki.ti.com/index.php/TISCI for protocol definition.
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| /Documentation/devicetree/bindings/timer/ |
| D | intel,ixp4xx-timer.yaml | 8 title: Intel IXP4xx XScale Networking Processors Timers
13 description: This timer is found in the Intel IXP4xx processors.
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| D | csky,mptimer.txt | 2 C-SKY Multi-processors Timer
5 C-SKY multi-processors timer is designed for C-SKY SMP system and the
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| /Documentation/devicetree/bindings/gpio/ |
| D | intel,ixp4xx-gpio.txt | 1 Intel IXP4xx XScale Networking Processors GPIO
3 This GPIO controller is found in the Intel IXP4xx processors.
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| /Documentation/admin-guide/hw-vuln/ |
| D | multihit.rst | 4 iTLB multihit is an erratum where some processors may incur a machine check
12 Affected processors
18 - non-Intel processors
22 - Intel processors that have the PSCHANGE_MC_NO bit set in the
41 of the page tables. Modern processors use virtual memory, a technique that creates
42 the illusion of a very large memory for processors. This virtual space is split
47 processors include a structure, called TLB, that caches recent translations.
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| D | mds.rst | 8 Affected processors
11 This vulnerability affects a wide range of Intel processors. The
14 - Processors from AMD, Centaur and other non Intel vendors
20 - Intel processors which have the ARCH_CAP_MDS_NO bit set in the
26 Not all processors are affected by all variants of MDS, but the mitigation
45 When performing store, load, L1 refill operations, processors write data
268 Not specifying this option is equivalent to "mds=full". For processors
304 The kernel default mitigations for vulnerable processors are:
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | st-rproc.txt | 4 This binding provides support for adjunct processors found on ST SoCs.
6 Co-processors can be controlled from the bootloader or the primary OS. If
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| /Documentation/devicetree/bindings/mailbox/ |
| D | hisilicon,hi3660-mailbox.txt | 4 are passed between processors, including application & communication
5 processors, MCU, HIFI, etc. Each channel is unidirectional and accessed
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| D | nvidia,tegra186-hsp.txt | 3 The HSP modules are used for the processors to share resources and communicate
7 two processors not in an SMP relationship.
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| D | fsl,mu.txt | 4 The Messaging Unit module enables two processors within the SoC to
9 Because the MU manages the messaging between processors, the MU uses
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| /Documentation/devicetree/bindings/display/ |
| D | arm,malidp.txt | 3 The following bindings apply to a family of Display Processors sold as
5 DP650 processors that offer multiple composition layers, support for
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| /Documentation/arm/sti/ |
| D | stih416-overview.rst | 8 The STiH416 is the next generation of HD, AVC set-top box processors
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| D | stih415-overview.rst | 8 The STiH415 is the next generation of HD, AVC set-top box processors
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