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/Documentation/devicetree/bindings/net/can/
Dxilinx_can.txt2 ---------------------------------------------------------
5 - compatible : Should be:
6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers
7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers
8 - "xlnx,canfd-1.0" for CAN FD controllers
9 - "xlnx,canfd-2.0" for CAN FD 2.0 controllers
10 - reg : Physical base address and size of the controller
12 - interrupts : Property with a value describing the interrupt
14 - clock-names : List of input clock names
15 - "can_clk", "pclk" (For CANPS),
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/Documentation/devicetree/bindings/net/
Daltera_tse.txt1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
8 - reg: Address and length of the register set for the device. It contains
9 the information of registers in the same order as described by reg-names
10 - reg-names: Should contain the reg names
14 "rx_csr" : xDMA Rx dispatcher control and status space region
15 "rx_desc": MSGDMA Rx dispatcher descriptor space region
16 "rx_resp": MSGDMA Rx dispatcher response space region
18 - interrupts: Should contain the TSE interrupts and it's mode.
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Dadi,adin.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandru Ardelean <alexandru.ardelean@analog.com>
16 - $ref: ethernet-phy.yaml#
19 adi,rx-internal-delay-ps:
21 RGMII RX Clock Delay used only when PHY operates in RGMII mode with
22 internal delay (phy-mode is 'rgmii-id' or 'rgmii-rxid') in pico-seconds.
26 adi,tx-internal-delay-ps:
29 internal delay (phy-mode is 'rgmii-id' or 'rgmii-txid') in pico-seconds.
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Dti,dp83867.txt1 * Texas Instruments - dp83867 Giga bit ethernet phy
4 - reg - The ID number for the phy, usually a small integer
5 - ti,rx-internal-delay - RGMII Receive Clock Delay - see dt-bindings/net/ti-dp83867.h
8 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
11 - ti,fifo-depth - Transmitt FIFO depth- see dt-bindings/net/ti-dp83867.h
14 Note: If the interface type is PHY_INTERFACE_MODE_RGMII the TX/RX clock delays
19 should use "rgmii-id" if internal delays are desired as this may be
23 - ti,min-output-impedance - MAC Interface Impedance control to set
26 - ti,max-output-impedance - MAC Interface Impedance control to set
29 - ti,dp83867-rxctrl-strap-quirk - This denotes the fact that the
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Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
18 - $ref: /schemas/types.yaml#definitions/uint8-array
19 - items:
20 - minItems: 6
25 mac-address:
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Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.50a
25 - snps,dwmac-3.610
26 - snps,dwmac-3.70a
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/Documentation/devicetree/bindings/mmc/
Dsynopsys-dw-mshc.txt11 - snps,dw-mshc: for controllers compliant with synopsys dw-mshc.
12 * #address-cells: should be 1.
13 * #size-cells: should be 0.
16 child-nodes with each child-node representing a supported slot. There should
23 property is 0 to (num-slots -1), where num-slots is the value
24 specified by the num-slots property.
26 * bus-width: as documented in mmc core bindings.
28 * wp-gpios: specifies the write protect gpio line. The format of the
30 for write-protect, this property is optional.
32 * disable-wp: If the wp-gpios property isn't present then (by default)
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Dexynos-dw-mshc.txt7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
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/Documentation/devicetree/bindings/sound/
Dfsl,esai.txt3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
10 - compatible : Compatible list, should contain one of the following
12 "fsl,imx35-esai",
13 "fsl,vf610-esai",
14 "fsl,imx6ull-esai",
16 - reg : Offset and length of the register set for the device.
18 - interrupts : Contains the spdif interrupt.
20 - dmas : Generic dma devicetree binding as described in
23 - dma-names : Two dmas have to be defined, "tx" and "rx".
25 - clocks : Contains an entry for each entry in clock-names.
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Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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/Documentation/devicetree/bindings/dma/
Dfsl-imx-sdma.txt4 - compatible : Should be one of
5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx8mq-sdma"
13 The -to variants should be preferred since they allow to determine the
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/Documentation/admin-guide/
Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
56 Documentation/firmware-guide/acpi/debug.rst for more information about
119 Disable auto-serialization of AML methods
122 auto-serialization feature.
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