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/Documentation/devicetree/bindings/i2c/
Di2c-gpio.yaml28 scl-gpios:
30 gpio used for the scl signal, this should be flagged as
36 i2c-gpio,scl-output-only:
37 description: scl as output only
52 description: sda and scl gpio, alternative for {sda,scl}-gpios
61 i2c-gpio,scl-open-drain:
65 GPIO line used for SCL into open drain mode, and that something is not
71 - scl-gpios
Di2c-rk3x.txt35 - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
36 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
40 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
45 (t(f) in the I2C specification). If not specified we'll use the SCL
66 i2c-scl-rising-time-ns = <800>;
67 i2c-scl-falling-time-ns = <100>;
Di2c.txt43 - i2c-scl-falling-time-ns
44 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
47 - i2c-scl-internal-delay-ns
48 Number of nanoseconds the IP core additionally needs to setup SCL.
50 - i2c-scl-rising-time-ns
51 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
Di2c-stm32.txt26 - i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
28 - i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)
Di2c-st.txt17 - st,i2c-min-scl-pulse-width-us : The minimum valid SCL pulse width that is
39 st,i2c-min-scl-pulse-width-us = <0>;
Di2c-imx.txt17 - scl-gpios: specify the gpio related to SCL pin
47 scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
Di2c-designware.txt31 - i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
58 i2c-scl-falling-time-ns = <300>;
Drenesas,i2c.txt48 - i2c-scl-falling-time-ns: see i2c.txt
49 - i2c-scl-internal-delay-ns: see i2c.txt
50 - i2c-scl-rising-time-ns: see i2c.txt
Di2c-s3c2410.txt20 - gpios: The order of the gpios should be the following: <SDA, SCL>.
45 &gpd1 3 0 /* SCL */>;
Di2c-demux-pinctrl.txt106 &gpio5 5 GPIO_ACTIVE_HIGH /* scl */
/Documentation/i2c/
Dgpio-fault-injection.rst20 "scl"
23 By reading this file, you get the current state of SCL. By writing, you can
25 "echo 0 > scl" you force SCL low and thus, no communication will be possible
27 the condition of SCL being unresponsive and report an error to the upper
62 being pulled low by the device while SCL is high. So, similar to the "sda" file
65 SDA after toggling SCL.
81 register 0x00 (if it has registers) when further clock pulses happen on SCL.
99 Arbitration lost is achieved by waiting for SCL going down by the master under
104 should be detected beforehand. Also note, that SCL going down is monitored
129 Start of a transfer is detected by waiting for SCL going down by the master
/Documentation/devicetree/bindings/i3c/
Dcdns,i3c-master.txt21 - i2c-scl-hz
22 - i3c-scl-hz
37 i2c-scl-hz = <100000>;
Di3c.txt24 - i3c-scl-hz: frequency of the SCL signal used for I3C transfers.
27 - i2c-scl-hz: frequency of the SCL signal used for I2C transfers.
53 frequency on SCL
118 i2c-scl-hz = <100000>;
Dsnps,dw-i3c-master.txt20 - i2c-scl-hz
21 - i3c-scl-hz
/Documentation/devicetree/bindings/iio/temperature/
Dtmp007.txt15 0 SCL 0x43
19 1 SCL 0x47
Dmlx90614.txt15 is no need for a GPIO driving the SCL line. If no GPIO is given, power
/Documentation/devicetree/bindings/pinctrl/
Dcirrus,lochnagar.txt73 dsp-dmicclk1, dsp-dmicdat1, dsp-dmicclk2, dsp-dmicdat2, i2c2-scl,
74 i2c2-sda, i2c3-scl, i2c3-sda, i2c4-scl, i2c4-sda, dsp-standby,
93 gf-uart2-tx, usb-uart-rx, usb-uart-tx, i2c2-scl, i2c2-sda,
94 i2c3-scl, i2c3-sda, i2c4-scl, i2c4-sda, spdif-aif, psia1,
Dfsl,imx7d-pinctrl.txt58 any of the iomux controllers. For example the I2C1 IP can use SCL pad from
/Documentation/i2c/muxes/
Di2c-mux-gpio.rst16 | | SCL/SDA | |-------------- | |
25 SCL/SDA of the master I2C bus is multiplexed to bus segment 1..M
/Documentation/devicetree/bindings/display/panel/
Draspberrypi,7inch-touchscreen.yaml56 scl-gpios = <&gpio 28 0>;
/Documentation/i2c/busses/
Di2c-parport.rst57 SCL ----------x--------o |-----------x------------------- pin 2
97 - Obviously you cannot read SCL (so it's not really standard-compliant).
112 SCL ----------x--------x--| o---x------------------------ pin 15
Di2c-mlxcpld.rst35 Configure the width of I2C SCL half clock cycle (in 4 LPC_CLK
/Documentation/ABI/testing/
Dsysfs-bus-i3c29 The frequency (expressed in Hz) of the SCL signal when
36 The frequency (expressed in Hz) of the SCL signal when
/Documentation/driver-api/
Di2c.rst8 the same bus. I2C only needs two signals (SCL for clock, SDA for data),
/Documentation/devicetree/bindings/mfd/
Das3722.txt21 i2c scl/sda pins. Missing this will disable internal pullup on i2c
22 scl/sda lines.

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