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1* I2C controller embedded in STMicroelectronics STM32 I2C platform
2
3Required properties:
4- compatible: Must be one of the following
5  - "st,stm32f4-i2c"
6  - "st,stm32f7-i2c"
7- reg: Offset and length of the register set for the device
8- interrupts: Must contain the interrupt id for I2C event and then the
9  interrupt id for I2C error.
10- resets: Must contain the phandle to the reset controller.
11- clocks: Must contain the input clock of the I2C instance.
12- A pinctrl state named "default" must be defined to set pins in mode of
13  operation for I2C transfer
14- #address-cells = <1>;
15- #size-cells = <0>;
16
17Optional properties:
18- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified,
19  the default 100 kHz frequency will be used.
20  For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are
21  100000 and 400000.
22  For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and Fast-mode
23  Plus are supported, possible values are 100000, 400000 and 1000000.
24- dmas: List of phandles to rx and tx DMA channels. Refer to stm32-dma.txt.
25- dma-names: List of dma names. Valid names are: "rx" and "tx".
26- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
27  For STM32F7, STM32H7 and STM32MP1 only.
28- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)
29  For STM32F7, STM32H7 and STM32MP1 only.
30  I2C Timings are derived from these 2 values
31- st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
32  Plus speed is selected by slave.
33	1st cell: phandle to syscfg
34	2nd cell: register offset within SYSCFG
35	3rd cell: register bitmask for FMP bit
36  For STM32F7, STM32H7 and STM32MP1 only.
37
38Example:
39
40	i2c@40005400 {
41		compatible = "st,stm32f4-i2c";
42		#address-cells = <1>;
43		#size-cells = <0>;
44		reg = <0x40005400 0x400>;
45		interrupts = <31>,
46			     <32>;
47		resets = <&rcc 277>;
48		clocks = <&rcc 0 149>;
49		pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
50		pinctrl-names = "default";
51	};
52
53	i2c@40005400 {
54		compatible = "st,stm32f7-i2c";
55		#address-cells = <1>;
56		#size-cells = <0>;
57		reg = <0x40005400 0x400>;
58		interrupts = <31>,
59			     <32>;
60		resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
61		clocks = <&rcc 1 CLK_I2C1>;
62		pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
63		pinctrl-names = "default";
64		st,syscfg-fmp = <&syscfg 0x4 0x1>;
65	};
66