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Searched full:syscfg (Results 1 – 25 of 25) sorted by relevance

/Documentation/devicetree/bindings/interrupt-controller/
Dst,sti-irq-syscfg.txt10 "st,stih415-irq-syscfg"
11 "st,stih416-irq-syscfg"
12 "st,stih407-irq-syscfg"
13 "st,stid127-irq-syscfg"
14 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers
27 irq-syscfg {
28 compatible = "st,stih416-irq-syscfg";
29 st,syscfg = <&syscfg_cpu>;
/Documentation/devicetree/bindings/arm/stm32/
Dstm32-syscon.txt5 - " st,stm32mp157-syscfg " - for stm32mp157 based SoCs,
8 - clocks: phandle to the syscfg clock
11 syscfg: syscon@50020000 {
12 compatible = "st,stm32mp157-syscfg", "syscon";
14 clocks = <&rcc SYSCFG>;
/Documentation/devicetree/bindings/power/reset/
Dst-reset.txt5 - st,syscfg: should be a phandle of the syscfg node.
10 st,syscfg = <&syscfg_sbc_reg>;
/Documentation/devicetree/bindings/i2c/
Di2c-stm32.txt31 - st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
33 1st cell: phandle to syscfg
34 2nd cell: register offset within SYSCFG
64 st,syscfg-fmp = <&syscfg 0x4 0x1>;
/Documentation/devicetree/bindings/regulator/
Dst,stm32-booster.txt10 - st,syscfg: Phandle to system configuration controller.
16 st,syscfg = <&syscfg>;
/Documentation/devicetree/bindings/phy/
Dphy-stih41x-usb.txt9 - st,syscfg : should be a phandle of the syscfg node
21 st,syscfg = <&syscfg_rear>;
Dphy-miphy28lp.txt9 - st,syscfg : Should be a phandle of the system configuration register group
29 - st,syscfg : Offset of the parent configuration register.
50 st,syscfg = <&syscfg_core>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
92 st,syscfg = <0x11c 0x820>;
Dphy-stih407-usb.txt8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
20 st,syscfg = <&syscfg_core 0x100 0xf4>;
Dphy-miphy365x.txt9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
43 st,syscfg = <&syscfg_rear 0x824 0x828>;
57 reg-names = "sata", "pcie", "syscfg";
/Documentation/devicetree/bindings/remoteproc/
Dstm32-rproc.txt11 - st,syscfg-holdboot: Reference to the system configuration which holds the
16 - st,syscfg-tz: Reference to the system configuration which holds the RCC trust
46 - st,syscfg-pdds: Reference to the system configuration which holds the remote
61 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
62 st,syscfg-tz = <&rcc 0x000 0x1>;
Dst-rproc.txt20 - st,syscfg System configuration register which holds the boot vector
40 st,syscfg = <&syscfg_core 0x228>;
/Documentation/devicetree/bindings/watchdog/
Dst_lpc_wdt.txt24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
37 st,syscfg = <&syscfg_core>;
/Documentation/devicetree/bindings/usb/
Ddwc3-st.txt9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
47 reg-names = "reg-glue", "syscfg-reg";
48 st,syscfg = <&syscfg_core>;
/Documentation/devicetree/bindings/sound/
Dst,sti-asoc-card.txt18 - st,syscfg: phandle to boot-device system configuration registers
57 st,syscfg = <&syscfg_core>;
69 st,syscfg = <&syscfg_core>;
80 st,syscfg = <&syscfg_core>;
91 st,syscfg = <&syscfg_core>;
105 - st,syscfg: phandle to boot-device system configuration registers.
/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt65xx.txt35 - mediatek,pctl-regmap: Should be a phandle of the syscfg node.
80 syscfg_pctl_a: syscfg-pctl-a@10005000 {
81 compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
85 syscfg_pctl_b: syscfg-pctl-b@1020c020 {
86 compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
Dpinctrl-st.txt34 - st,syscfg : Should be a phandle of the syscfg node.
85 st,syscfg = <&syscfg_sbc>;
Dst,stm32-pinctrl.yaml39 st,syscfg:
/Documentation/devicetree/bindings/mtd/
Dst-fsm.txt11 - st,syscfg : Phandle to boot-device system configuration registers
21 st,syscfg = <&syscfg_rear>;
/Documentation/devicetree/bindings/rtc/
Dst,stm32-rtc.txt18 - st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
38 st,syscfg = <&pwrcfg 0x00 0x100>;
51 st,syscfg = <&pwrcfg 0x00 0x100>;
/Documentation/devicetree/bindings/clock/
Dst,stm32h7-rcc.txt26 - st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
38 st,syscfg = <&pwrcfg>;
/Documentation/devicetree/bindings/net/
Dstm32-dwmac.txt40 st,syscon = <&syscfg 0x4>;
/Documentation/devicetree/bindings/dma/
Dst_fdma.txt73 st,syscfg = <&syscfg_core>;
/Documentation/devicetree/bindings/display/
Dst,stih4xx.txt194 reg-names = "tvout-reg", "hda-reg", "syscfg";
202 reg-names = "hdmi-reg", "syscfg";
/Documentation/networking/device_drivers/stmicro/
Dstmmac.txt175 o fix_mac_speed: this callback is used for modifying some syscfg registers
238 |-> to write an internal syscfg
/Documentation/devicetree/bindings/iio/adc/
Dst,stm32-adc.txt54 - st,syscfg: Phandle to system configuration controller. It can be used to