Home
last modified time | relevance | path

Searched full:vpu (Results 1 – 18 of 18) sorted by relevance

/Documentation/devicetree/bindings/media/
Dcoda.txt5 called VPU (Video Processing Unit).
9 (a) "fsl,imx27-vpu" for CodaDx6 present in i.MX27
10 (b) "fsl,imx51-vpu" for CodaHx4 present in i.MX51
11 (c) "fsl,imx53-vpu" for CODA7541 present in i.MX53
12 (d) "fsl,imx6q-vpu" for CODA960 present in i.MX6q
15 - interrupts : Should contain the VPU interrupt. For CODA960,
24 vpu: vpu@63ff4000 {
25 compatible = "fsl,imx53-vpu";
Drockchip-vpu.txt1 device-tree bindings for rockchip VPU codec
8 "rockchip,rk3288-vpu";
9 "rockchip,rk3328-vpu";
10 "rockchip,rk3399-vpu";
15 - clocks: phandle to VPU aclk, hclk clocks
22 vpu: video-codec@ff9a0000 {
23 compatible = "rockchip,rk3288-vpu";
34 vpu: video-codec@ff350000 {
35 compatible = "rockchip,rk3328-vpu";
Dmediatek-vpu.txt7 - compatible: "mediatek,mt8173-vpu"
14 - clock-names: must be main. It is the main clock of VPU
19 to be used for VPU extended memory; if not present, VPU may be located
23 vpu: vpu@10020000 {
24 compatible = "mediatek,mt8173-vpu";
Dmediatek-vcodec.txt22 - mediatek,vpu : the node of video processor unit
51 mediatek,vpu = <&vpu>;
108 mediatek,vpu = <&vpu>;
Dmediatek-mdp.txt7 - mediatek,vpu: the node of video processor unit, see
8 Documentation/devicetree/bindings/media/mediatek-vpu.txt for details.
44 mediatek,vpu = <&vpu>;
Dcedrus.txt1 Device-tree bindings for the VPU found in Allwinner SoCs, referred to as the
4 The VPU can only access the first 256 MiB of DRAM, that are DMA-mapped starting
Dfsl-vdoa.txt6 960 VPU to the conventional raster-scan order for scanout.
/Documentation/devicetree/bindings/power/
Damlogic,meson-gx-pwrc.txt6 VPU Power Domain
20 - "amlogic,meson-gx-pwrc-vpu" for the Meson GX SoCs
21 - "amlogic,meson-g12a-pwrc-vpu" for the Meson G12A SoCs
26 - clocks: from common clock binding: handle to VPU and VAPB clocks
27 - clock-names: from common clock binding: must contain "vpu", "vapb"
41 pwrc_vpu: power-controller-vpu {
42 compatible = "amlogic,meson-gx-pwrc-vpu";
59 clock-names = "vpu", "vapb";
Damlogic,meson-ee-pwrc.yaml34 - const: vpu
92 clock-names = "vpu", "vapb";
Dfsl,imx-gpc.txt86 vpu: vpu@2040000 {
/Documentation/devicetree/bindings/display/
Damlogic,meson-vpu.yaml5 $id: "http://devicetree.org/schemas/display/amlogic,meson-vpu.yaml#"
17 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
63 - amlogic,meson-gxbb-vpu # GXBB (S905)
64 - amlogic,meson-gxl-vpu # GXL (S905X, S905D)
65 - amlogic,meson-gxm-vpu # GXM (S912)
66 - const: amlogic,meson-gx-vpu
68 - amlogic,meson-g12a-vpu # G12A (S905X2, S905Y2, S905D2)
75 - const: vpu
112 vpu: vpu@d0100000 {
113 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
[all …]
Damlogic,meson-dw-hdmi.yaml33 Pixel data arrives in "4:4:4" format from the VENC block and the VPU HDMI mux
132 /* VPU VENC Input */
Dsimple-framebuffer.yaml114 - vpu-cvbs
115 - vpu-hdmi
/Documentation/devicetree/bindings/reset/
Dfsl,imx-src.txt27 The system reset controller can be used to reset the GPU, VPU,
/Documentation/devicetree/bindings/clock/
Dimx8qxp-lpcg.txt23 "fsl,imx8qxp-lpcg-vpu"
/Documentation/devicetree/bindings/soc/dove/
Dpmu.txt42 vpu_domain: vpu-domain {
/Documentation/gpu/
Dmeson.rst16 DMC|---------------VPU (Video Processing Unit)----------------|------HHI------|
/Documentation/media/v4l-drivers/
Dcx2341x.rst81 3 processors on chip, Java ones, VPU, SPU, APU, maybe these are the
126 - 0x9058: VPU control
190 - Write 0xFFFFFFFE to register 0x9058 to stop the VPU.
205 to re-enable the VPU.