/arch/arm/lib/ |
D | io-writesw-armv3.S | 24 mov r3, r3, lsr #16 44 orr ip, ip, ip, lsr #16 47 mov ip, r3, lsr #16 52 orr ip, ip, ip, lsr #16 55 mov ip, r4, lsr #16 60 orr ip, ip, ip, lsr #16 63 mov ip, r5, lsr #16 68 orr ip, ip, ip, lsr #16 71 mov ip, r6, lsr #16 87 orr ip, ip, ip, lsr #16 [all …]
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D | findbit.S | 26 ARM( ldrb r3, [r0, r2, lsr #3] ) 27 THUMB( lsr r3, r2, #3 ) 47 ARM( ldrb r3, [r0, r2, lsr #3] ) 48 THUMB( lsr r3, r2, #3 ) 51 movs r3, r3, lsr ip @ shift off unused bits 67 ARM( ldrb r3, [r0, r2, lsr #3] ) 68 THUMB( lsr r3, r2, #3 ) 88 ARM( ldrb r3, [r0, r2, lsr #3] ) 89 THUMB( lsr r3, r2, #3 ) 91 movs r3, r3, lsr ip @ shift off unused bits [all …]
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D | lib1funcs.S | 89 cmp \dividend, \divisor, lsr #1 90 subhs \dividend, \dividend, \divisor, lsr #1 91 orrhs \result, \result, \curbit, lsr #1 92 cmp \dividend, \divisor, lsr #2 93 subhs \dividend, \dividend, \divisor, lsr #2 94 orrhs \result, \result, \curbit, lsr #2 95 cmp \dividend, \divisor, lsr #3 96 subhs \dividend, \dividend, \divisor, lsr #3 97 orrhs \result, \result, \curbit, lsr #3 99 movsne \curbit, \curbit, lsr #4 @ No, any more bits to do? [all …]
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D | div64.S | 89 movsne ip, ip, lsr #1 90 mov yl, yl, lsr #1 110 movs ip, ip, lsr #1 128 mov ip, ip, lsr xh 133 mov ip, ip, lsr #1 142 movs ip, ip, lsr #1 160 movhs yl, yl, lsr #16 164 movhs yl, yl, lsr #8 168 movhs yl, yl, lsr #4 173 addls ip, ip, yl, lsr #1 [all …]
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D | io-writesw-armv4.S | 13 mov \rd, \rd, lsr #16 16 mov lr, \rd, lsr #16 68 #define push_hbyte1 lsr #24 70 #define pull_hbyte0 lsr #24 84 1: mov ip, r3, lsr #8 94 3: movne ip, r3, lsr #8
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D | muldi3.S | 30 mov ip, xl, lsr #16 31 mov yh, yl, lsr #16 39 adc xh, xh, yh, lsr #16 41 adc xh, xh, ip, lsr #16
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D | io-writesb.S | 13 mov \rd, \rd, lsr #8 15 mov \rd, \rd, lsr #8 17 mov \rd, \rd, lsr #8 20 mov lr, \rd, lsr #24 22 mov lr, \rd, lsr #16 24 mov lr, \rd, lsr #8
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D | io-readsw-armv4.S | 84 #define push_hbyte0 lsr #8 90 #define pull_hbyte1 lsr #8 101 _LE_ONLY_( mov ip, ip, lsr #8 ) 102 _BE_ONLY_( mov ip, ip, lsr #24 ) 117 _BE_ONLY_( mov ip, ip, lsr #24 ) 124 _LE_ONLY_( movne ip, ip, lsr #8 ) 125 _BE_ONLY_( movne ip, ip, lsr #24 )
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D | lshrdi3.S | 45 movmi al, al, lsr r2 46 movpl al, ah, lsr r3 50 mov ah, ah, lsr r2
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D | bswapsdi2.S | 20 mov r3, r3, lsr #8 30 mov r1, r1, lsr #8 31 mov r3, r3, lsr #8
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/arch/arm/mm/ |
D | abort-lv4t.S | 34 add pc, pc, r7, lsr #22 @ Now branch to the relevant processing routine 69 add r6, r6, r9, lsr #1 71 add r6, r6, r9, lsr #2 73 add r6, r6, r9, lsr #3 74 add r6, r6, r6, lsr #8 75 add r6, r6, r6, lsr #4 78 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn' 82 str r7, [r2, r9, lsr #14] @ Put register 'Rn' 94 orrne r6, r9, r6, lsr #4 @ combine nibbles } else 98 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn' [all …]
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D | tlb-v7.S | 36 mov r0, r0, lsr #PAGE_SHIFT @ align address 37 mov r1, r1, lsr #PAGE_SHIFT 70 mov r0, r0, lsr #PAGE_SHIFT @ align address 71 mov r1, r1, lsr #PAGE_SHIFT
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D | tlb-v6.S | 38 mov r0, r0, lsr #PAGE_SHIFT @ align address 39 mov r1, r1, lsr #PAGE_SHIFT 69 mov r0, r0, lsr #PAGE_SHIFT @ align address 70 mov r1, r1, lsr #PAGE_SHIFT
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/arch/mips/include/asm/netlogic/xlp-hal/ |
D | uart.h | 123 uint32_t lsr; in nlm_uart_outbyte() local 126 lsr = nlm_read_uart_reg(base, UART_LINE_STS); in nlm_uart_outbyte() 127 if (lsr & 0x20) in nlm_uart_outbyte() 137 int data, lsr; in nlm_uart_inbyte() local 140 lsr = nlm_read_uart_reg(base, UART_LINE_STS); in nlm_uart_inbyte() 141 if (lsr & 0x80) { /* parity/frame/break-error - push a zero */ in nlm_uart_inbyte() 145 if (lsr & 0x01) { /* Rx data */ in nlm_uart_inbyte()
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/arch/arm64/lib/ |
D | tishift.S | 17 lsr x3, x0, x3 38 lsr x0, x0, x2 60 lsr x0, x0, x2 62 lsr x2, x1, x2 70 lsr x0, x1, x0
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D | memcmp.S | 57 lsr limit_wd, limit_wd, #3 /* Convert to Dwords. */ 83 CPU_BE( lsr mask, mask, limit ) 107 lsr limit_wd, limit_wd, #3 109 add limit_wd, limit_wd, tmp3, lsr #3 118 CPU_LE( lsr tmp2, tmp2, tmp1 ) 154 lsr limit_wd, limit, #3 163 lsr limit_wd, limit, #3 225 lsr data1, data1, #56 226 sub result, data1, data2, lsr #56
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D | strncmp.S | 69 lsr limit_wd, limit_wd, #3 /* Convert to Dwords. */ 98 CPU_BE( lsr mask, mask, limit ) 128 CPU_LE( lsr tmp2, tmp2, tmp3 ) /* Shift (tmp1 & 63). */ 131 lsr limit_wd, limit_wd, #3 137 add limit_wd, limit_wd, tmp3, lsr #3 175 lsr limit_wd, limit, #3 186 lsr limit_wd, limit, #3 276 lsr data1, data1, #56 277 sub result, data1, data2, lsr #56
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D | strnlen.S | 58 lsr limit_wd, limit_wd, #4 /* Convert to Qwords. */ 113 add len, len, pos, lsr #3 /* Bits to bytes. */ 133 lsr limit_wd, limit_wd, #4 136 add limit_wd, limit_wd, tmp3, lsr #4 145 CPU_LE( lsr tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
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/arch/arm/mach-ebsa110/include/mach/ |
D | entry-macro.S | 24 moveq \stat, \stat, lsr #4 27 moveq \stat, \stat, lsr #2 30 moveq \stat, \stat, lsr #1
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/arch/arm/boot/compressed/ |
D | ll_char_wr.S | 83 mov ip, r7, lsr #4 93 mov ip, r7, lsr #4 114 mov r4, r4, lsr #8 116 mov r4, r4, lsr #8 118 mov r4, r4, lsr #8 121 mov r7, r7, lsr #8 123 mov r7, r7, lsr #8 125 mov r7, r7, lsr #8
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/arch/arc/lib/ |
D | memcpy-archs.S | 10 # define SHIFT_2(RX,RY,IMM) lsr RX, RY, IMM ; >> 14 # define EXTRACT_2(RX,RY,IMM) lsr RX, RY, IMM 16 # define SHIFT_1(RX,RY,IMM) lsr RX, RY, IMM ; >> 20 # define EXTRACT_1(RX,RY,IMM) lsr RX, RY, IMM 21 # define EXTRACT_2(RX,RY,IMM) lsr RX, RY, 0x08 62 lsr.f lp_count, r2, ZOLSHFT 100 lsr.f lp_count, r2, 3 145 lsr.f lp_count, r2, 3 167 lsr.nz r5, r5, 16 185 lsr.f lp_count, r2, 3 [all …]
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/arch/arm/mach-omap2/ |
D | omap-headsmp.S | 45 mov r0, r0, lsr #5 63 mov r0, r0, lsr #5 85 mov r0, r0, lsr #9 102 mov r0, r0, lsr #9
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/arch/m68k/math-emu/ |
D | fp_util.S | 132 lsr.l #8,%d1 | exponent / sign 133 lsr.l #7,%d1 134 lsr.w #8,%d1 170 lsr.l #8,%d1 | exponent / sign 171 lsr.l #7,%d1 172 lsr.w #5,%d1 186 lsr.l %d0,%d1
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/arch/x86/platform/ce4100/ |
D | ce4100.c | 54 unsigned int ret, ier, lsr; in ce4100_mem_serial_in() local 64 lsr = mem_serial_in(p, UART_LSR); in ce4100_mem_serial_in() 67 if (lsr & (UART_LSR_THRE | UART_LSR_TEMT)) in ce4100_mem_serial_in()
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/arch/hexagon/lib/ |
D | memcpy.S | 194 len8 = lsr(len, #3); /* %8 < 97 */ 222 prolog &= lsr(mask, back); 249 prolog = lsr(prolog, #3); 256 kernel = lsr(kernel, #5); 302 ldata0 = lsr(ldata0, shiftb); 308 ldata0 = lsr(ldata0, shiftb); 437 epilogdws = lsr(epilog, #3); 476 ldata0 = lsr(ldata0, shiftb); 482 ldata0 = lsr(ldata0, shiftb);
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