| /arch/x86/um/shared/sysdep/ |
| D | ptrace.h | 11 #define REGS_IP(r) ((r)[HOST_IP]) argument
12 #define REGS_SP(r) ((r)[HOST_SP]) argument
13 #define REGS_EFLAGS(r) ((r)[HOST_EFLAGS]) argument
14 #define REGS_AX(r) ((r)[HOST_AX]) argument
15 #define REGS_BX(r) ((r)[HOST_BX]) argument
16 #define REGS_CX(r) ((r)[HOST_CX]) argument
17 #define REGS_DX(r) ((r)[HOST_DX]) argument
18 #define REGS_SI(r) ((r)[HOST_SI]) argument
19 #define REGS_DI(r) ((r)[HOST_DI]) argument
20 #define REGS_BP(r) ((r)[HOST_BP]) argument
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| D | ptrace_64.h | 13 #define REGS_R8(r) ((r)[HOST_R8]) argument
14 #define REGS_R9(r) ((r)[HOST_R9]) argument
15 #define REGS_R10(r) ((r)[HOST_R10]) argument
16 #define REGS_R11(r) ((r)[HOST_R11]) argument
17 #define REGS_R12(r) ((r)[HOST_R12]) argument
18 #define REGS_R13(r) ((r)[HOST_R13]) argument
19 #define REGS_R14(r) ((r)[HOST_R14]) argument
20 #define REGS_R15(r) ((r)[HOST_R15]) argument
44 #define UPT_R8(r) REGS_R8((r)->gp) argument
45 #define UPT_R9(r) REGS_R9((r)->gp) argument
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| D | ptrace_32.h | 15 #define UPT_SYSCALL_ARG1(r) UPT_BX(r) argument
16 #define UPT_SYSCALL_ARG2(r) UPT_CX(r) argument
17 #define UPT_SYSCALL_ARG3(r) UPT_DX(r) argument
18 #define UPT_SYSCALL_ARG4(r) UPT_SI(r) argument
19 #define UPT_SYSCALL_ARG5(r) UPT_DI(r) argument
20 #define UPT_SYSCALL_ARG6(r) UPT_BP(r) argument
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| /arch/x86/um/asm/ |
| D | ptrace.h | 11 #define user_mode(r) UPT_IS_USER(&(r)->regs) argument
13 #define PT_REGS_AX(r) UPT_AX(&(r)->regs) argument
14 #define PT_REGS_BX(r) UPT_BX(&(r)->regs) argument
15 #define PT_REGS_CX(r) UPT_CX(&(r)->regs) argument
16 #define PT_REGS_DX(r) UPT_DX(&(r)->regs) argument
18 #define PT_REGS_SI(r) UPT_SI(&(r)->regs) argument
19 #define PT_REGS_DI(r) UPT_DI(&(r)->regs) argument
20 #define PT_REGS_BP(r) UPT_BP(&(r)->regs) argument
21 #define PT_REGS_EFLAGS(r) UPT_EFLAGS(&(r)->regs) argument
23 #define PT_REGS_CS(r) UPT_CS(&(r)->regs) argument
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| /arch/powerpc/net/ |
| D | bpf_jit32.h | 75 #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ argument
76 else { PPC_ADDIS(r, base, IMM_HA(i)); \
77 PPC_LBZ(r, r, IMM_L(i)); } } while(0)
79 #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ argument
80 else { PPC_ADDIS(r, base, IMM_HA(i)); \
81 PPC_LD(r, r, IMM_L(i)); } } while(0)
83 #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ argument
84 else { PPC_ADDIS(r, base, IMM_HA(i)); \
85 PPC_LWZ(r, r, IMM_L(i)); } } while(0)
87 #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ argument
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| /arch/powerpc/platforms/ps3/ |
| D | mm.c | 214 static int ps3_mm_get_repository_highmem(struct mem_region *r) in ps3_mm_get_repository_highmem() argument
220 result = ps3_repository_read_highmem_info(0, &r->base, &r->size); in ps3_mm_get_repository_highmem()
225 if (!r->base || !r->size) { in ps3_mm_get_repository_highmem()
230 r->offset = r->base - map.rm.size; in ps3_mm_get_repository_highmem()
233 __func__, __LINE__, r->base, r->size); in ps3_mm_get_repository_highmem()
240 r->size = r->base = r->offset = 0; in ps3_mm_get_repository_highmem()
244 static int ps3_mm_set_repository_highmem(const struct mem_region *r) in ps3_mm_set_repository_highmem() argument
248 return r ? ps3_repository_write_highmem_info(0, r->base, r->size) : in ps3_mm_set_repository_highmem()
261 static int ps3_mm_region_create(struct mem_region *r, unsigned long size) in ps3_mm_region_create() argument
266 r->size = _ALIGN_DOWN(size, 1 << PAGE_SHIFT_16M); in ps3_mm_region_create()
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| /arch/x86/kernel/cpu/resctrl/ |
| D | core.c | 53 struct rdt_resource *r);
55 cat_wrmsr(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r);
58 struct rdt_resource *r);
176 static unsigned int cbm_idx(struct rdt_resource *r, unsigned int closid) in cbm_idx() argument
178 return closid * r->cache.cbm_idx_mult + r->cache.cbm_idx_offset; in cbm_idx()
201 struct rdt_resource *r = &rdt_resources_all[RDT_RESOURCE_L3]; in cache_alloc_hsw_probe() local
213 r->num_closid = 4; in cache_alloc_hsw_probe()
214 r->default_ctrl = max_cbm; in cache_alloc_hsw_probe()
215 r->cache.cbm_len = 20; in cache_alloc_hsw_probe()
216 r->cache.shareable_bits = 0xc0000; in cache_alloc_hsw_probe()
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| D | ctrlmondata.c | 31 struct rdt_resource *r) in bw_validate_amd() argument
42 if (bw < r->membw.min_bw || bw > r->default_ctrl) { in bw_validate_amd()
44 r->membw.min_bw, r->default_ctrl); in bw_validate_amd()
48 *data = roundup(bw, (unsigned long)r->membw.bw_gran); in bw_validate_amd()
52 int parse_bw_amd(struct rdt_parse_data *data, struct rdt_resource *r, in parse_bw_amd() argument
62 if (!bw_validate_amd(data->buf, &bw_val, r)) in parse_bw_amd()
77 static bool bw_validate(char *buf, unsigned long *data, struct rdt_resource *r) in bw_validate() argument
85 if (!r->membw.delay_linear) { in bw_validate()
96 if ((bw < r->membw.min_bw || bw > r->default_ctrl) && in bw_validate()
97 !is_mba_sc(r)) { in bw_validate()
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| D | internal.h | 171 struct rdt_resource *r; member
449 struct rdt_resource *r);
456 struct rdt_resource *r,
458 bool (*cbm_validate)(char *buf, u32 *data, struct rdt_resource *r);
465 int parse_cbm(struct rdt_parse_data *data, struct rdt_resource *r,
467 int parse_bw_intel(struct rdt_parse_data *data, struct rdt_resource *r,
469 int parse_bw_amd(struct rdt_parse_data *data, struct rdt_resource *r,
493 #define for_each_rdt_resource(r) \ argument
494 for (r = rdt_resources_all; r < rdt_resources_all + RDT_NUM_RESOURCES;\
495 r++)
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| /arch/mips/bmips/ |
| D | dma.c | 45 struct bmips_dma_range *r; in __phys_to_dma() local
47 for (r = bmips_dma_ranges; r && r->size; r++) { in __phys_to_dma()
48 if (pa >= r->child_addr && in __phys_to_dma()
49 pa < (r->child_addr + r->size)) in __phys_to_dma()
50 return pa - r->child_addr + r->parent_addr; in __phys_to_dma()
57 struct bmips_dma_range *r; in __dma_to_phys() local
59 for (r = bmips_dma_ranges; r && r->size; r++) { in __dma_to_phys()
60 if (dma_addr >= r->parent_addr && in __dma_to_phys()
61 dma_addr < (r->parent_addr + r->size)) in __dma_to_phys()
62 return dma_addr - r->parent_addr + r->child_addr; in __dma_to_phys()
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| /arch/mips/alchemy/common/ |
| D | usb.c | 100 unsigned long r, s; in __au1300_usb_phyctl() local
102 r = __raw_readl(base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
110 r |= USB_DWC_CTRL2_PHY1RS | USB_DWC_CTRL2_PHY0RS | in __au1300_usb_phyctl()
112 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
116 r &= ~(USB_DWC_CTRL2_PHY1RS | USB_DWC_CTRL2_PHY0RS | in __au1300_usb_phyctl()
118 __raw_writel(r, base + USB_DWC_CTRL2); in __au1300_usb_phyctl()
125 unsigned long r; in __au1300_ohci_control() local
131 r = __raw_readl(base + USB_DWC_CTRL3); /* enable OHCI block */ in __au1300_ohci_control()
132 r |= (id == 0) ? USB_DWC_CTRL3_OHCI0_CKEN in __au1300_ohci_control()
134 __raw_writel(r, base + USB_DWC_CTRL3); in __au1300_ohci_control()
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| /arch/mips/include/asm/ |
| D | cop2.h | 19 #define cop2_save(r) octeon_cop2_save(&(r)->thread.cp2) argument
20 #define cop2_restore(r) octeon_cop2_restore(&(r)->thread.cp2) argument
30 #define cop2_save(r) nlm_cop2_save(&(r)->thread.cp2) argument
31 #define cop2_restore(r) nlm_cop2_restore(&(r)->thread.cp2) argument
40 #define cop2_save(r) do { (void)(r); } while (0) argument
41 #define cop2_restore(r) do { (void)(r); } while (0) argument
47 #define cop2_save(r) do { (void)(r); } while (0) argument
48 #define cop2_restore(r) do { (void)(r); } while (0) argument
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| D | kvm_para.h | 19 register unsigned long r asm("v0"); in kvm_hypercall0()
24 : "=r" (r) : "r" (n) : "memory" in kvm_hypercall0()
27 return r; in kvm_hypercall0()
34 register unsigned long r asm("v0"); in kvm_hypercall1()
41 : "=r" (r) : "r" (n), "r" (a0) : "memory" in kvm_hypercall1()
44 return r; in kvm_hypercall1()
51 register unsigned long r asm("v0"); in kvm_hypercall2()
60 : "=r" (r) : "r" (n), "r" (a0), "r" (a1) : "memory" in kvm_hypercall2()
63 return r; in kvm_hypercall2()
70 register unsigned long r asm("v0"); in kvm_hypercall3()
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| /arch/powerpc/include/asm/ |
| D | pmac_feature.h | 367 #define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2)) argument
368 #define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r)) argument
370 #define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r))) argument
371 #define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) argument
372 #define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) argument
373 #define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) argument
374 #define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r))) argument
375 #define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) argument
389 #define UN_REG(r) (uninorth_base + ((r) >> 2)) argument
390 #define UN_IN(r) (in_be32(UN_REG(r))) argument
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| /arch/arm/common/ |
| D | locomo.c | 170 unsigned int r; in locomo_mask_irq() local
171 r = locomo_readl(lchip->base + LOCOMO_ICR); in locomo_mask_irq()
172 r &= ~(0x0010 << (d->irq - lchip->irq_base)); in locomo_mask_irq()
173 locomo_writel(r, lchip->base + LOCOMO_ICR); in locomo_mask_irq()
179 unsigned int r; in locomo_unmask_irq() local
180 r = locomo_readl(lchip->base + LOCOMO_ICR); in locomo_unmask_irq()
181 r |= (0x0010 << (d->irq - lchip->irq_base)); in locomo_unmask_irq()
182 locomo_writel(r, lchip->base + LOCOMO_ICR); in locomo_unmask_irq()
321 unsigned long r; in locomo_resume() local
340 r = locomo_readl(lchip->base + LOCOMO_KEYBOARD + LOCOMO_KIC); in locomo_resume()
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| /arch/x86/include/asm/ |
| D | refcount.h | 42 static __always_inline void refcount_add(unsigned int i, refcount_t *r) in refcount_add() argument
46 : [var] "+m" (r->refs.counter) in refcount_add()
51 static __always_inline void refcount_inc(refcount_t *r) in refcount_inc() argument
55 : [var] "+m" (r->refs.counter) in refcount_inc()
59 static __always_inline void refcount_dec(refcount_t *r) in refcount_dec() argument
63 : [var] "+m" (r->refs.counter) in refcount_dec()
68 bool refcount_sub_and_test(unsigned int i, refcount_t *r) in refcount_sub_and_test() argument
72 r->refs.counter, e, "er", i, "cx"); in refcount_sub_and_test()
82 static __always_inline __must_check bool refcount_dec_and_test(refcount_t *r) in refcount_dec_and_test() argument
86 r->refs.counter, e, "cx"); in refcount_dec_and_test()
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| /arch/um/include/asm/ |
| D | syscall-generic.h | 55 const struct uml_pt_regs *r = ®s->regs; in syscall_get_arguments() local
57 *args++ = UPT_SYSCALL_ARG1(r); in syscall_get_arguments()
58 *args++ = UPT_SYSCALL_ARG2(r); in syscall_get_arguments()
59 *args++ = UPT_SYSCALL_ARG3(r); in syscall_get_arguments()
60 *args++ = UPT_SYSCALL_ARG4(r); in syscall_get_arguments()
61 *args++ = UPT_SYSCALL_ARG5(r); in syscall_get_arguments()
62 *args = UPT_SYSCALL_ARG6(r); in syscall_get_arguments()
69 struct uml_pt_regs *r = ®s->regs; in syscall_set_arguments() local
71 UPT_SYSCALL_ARG1(r) = *args++; in syscall_set_arguments()
72 UPT_SYSCALL_ARG2(r) = *args++; in syscall_set_arguments()
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| /arch/x86/platform/olpc/ |
| D | olpc-xo1-sci.c | 177 int r; in process_sci_queue() local
181 r = olpc_ec_sci_query(&data); in process_sci_queue()
182 if (r || !data) in process_sci_queue()
203 if (r) in process_sci_queue()
318 int r; in setup_sci_interrupt() local
349 r = request_irq(sci_irq, xo1_sci_intr, 0, DRV_NAME, pdev); in setup_sci_interrupt()
350 if (r) in setup_sci_interrupt()
353 return r; in setup_sci_interrupt()
358 int r; in setup_ec_sci() local
360 r = gpio_request(OLPC_GPIO_ECSCI, "OLPC-ECSCI"); in setup_ec_sci()
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| /arch/arm64/include/asm/ |
| D | kvm_hyp.h | 18 #define read_sysreg_elx(r,nvh,vh) \ argument
21 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
22 __mrs_s("%0", r##vh), \
28 #define write_sysreg_elx(v,r,nvh,vh) \ argument
31 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
32 __msr_s(r##vh, "%x0"), \
43 #define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02) argument
44 #define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02) argument
45 #define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12) argument
46 #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12) argument
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| /arch/mips/netlogic/xlp/ |
| D | cop2-ex.c | 32 void nlm_cop2_save(struct nlm_cop2_state *r) in nlm_cop2_save() argument
54 : "=m"(*r) in nlm_cop2_save()
55 : "r"(r->tx), "r"(r->rx)); in nlm_cop2_save()
57 r->tx_msg_status = __read_32bit_c2_register($2, 0); in nlm_cop2_save()
58 r->rx_msg_status = __read_32bit_c2_register($3, 0) & 0x0fffffff; in nlm_cop2_save()
61 void nlm_cop2_restore(struct nlm_cop2_state *r) in nlm_cop2_restore() argument
85 : : "m"(*r), "r"(r->tx), "r"(r->rx)); in nlm_cop2_restore()
87 __write_32bit_c2_register($2, 0, r->tx_msg_status); in nlm_cop2_restore()
89 __write_32bit_c2_register($3, 0, r->rx_msg_status | rstat); in nlm_cop2_restore()
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| /arch/x86/pci/ |
| D | i386.c | 212 struct resource *r; in pcibios_allocate_bridge_resources() local
215 r = &dev->resource[idx]; in pcibios_allocate_bridge_resources()
216 if (!r->flags) in pcibios_allocate_bridge_resources()
218 if (r->parent) /* Already allocated */ in pcibios_allocate_bridge_resources()
220 if (!r->start || pci_claim_bridge_resource(dev, idx) < 0) { in pcibios_allocate_bridge_resources()
227 r->start = r->end = 0; in pcibios_allocate_bridge_resources()
228 r->flags = 0; in pcibios_allocate_bridge_resources()
253 struct resource *r; in pcibios_allocate_dev_resources() local
265 r = &dev->resource[idx]; in pcibios_allocate_dev_resources()
266 if (r->parent) /* Already allocated */ in pcibios_allocate_dev_resources()
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| /arch/c6x/platforms/ |
| D | dscr.c | 258 struct rmii_reset_reg *r; in dscr_rmii_reset() local
265 r = &dscr.rmii_resets[id]; in dscr_rmii_reset()
266 if (r->mask == 0) in dscr_rmii_reset()
271 val = soc_readl(dscr.base + r->reg); in dscr_rmii_reset()
273 dscr_write(r->reg, val | r->mask); in dscr_rmii_reset()
275 dscr_write(r->reg, val & ~(r->mask)); in dscr_rmii_reset()
396 struct locked_reg *r; in dscr_parse_locked_regs() local
408 r = &dscr.locked[i]; in dscr_parse_locked_regs()
410 r->reg = be32_to_cpup(p++); in dscr_parse_locked_regs()
411 r->lockreg = be32_to_cpup(p++); in dscr_parse_locked_regs()
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| /arch/arm64/kvm/ |
| D | sys_regs.h | 87 const struct sys_reg_desc *r) in reset_unknown() argument
89 BUG_ON(!r->reg); in reset_unknown()
90 BUG_ON(r->reg >= NR_SYS_REGS); in reset_unknown()
91 __vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL; in reset_unknown()
94 static inline void reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) in reset_val() argument
96 BUG_ON(!r->reg); in reset_val()
97 BUG_ON(r->reg >= NR_SYS_REGS); in reset_val()
98 __vcpu_sys_reg(vcpu, r->reg) = r->val; in reset_val()
102 const struct sys_reg_desc *r) in sysreg_hidden_from_guest() argument
104 if (likely(!r->visibility)) in sysreg_hidden_from_guest()
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| /arch/powerpc/kvm/ |
| D | powerpc.c | 79 int r; in kvmppc_prepare_to_enter() local
95 r = -EINTR; in kvmppc_prepare_to_enter()
116 r = kvmppc_core_check_requests(vcpu); in kvmppc_prepare_to_enter()
118 if (r > 0) in kvmppc_prepare_to_enter()
135 return r; in kvmppc_prepare_to_enter()
163 int r; in kvmppc_kvm_pv() local
225 r = EV_SUCCESS; in kvmppc_kvm_pv()
229 r = EV_SUCCESS; in kvmppc_kvm_pv()
237 r = EV_SUCCESS; in kvmppc_kvm_pv()
242 r = EV_UNIMPLEMENTED; in kvmppc_kvm_pv()
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| /arch/arm/kvm/ |
| D | coproc.h | 74 const struct coproc_reg *r) in reset_unknown() argument
76 BUG_ON(!r->reg); in reset_unknown()
77 BUG_ON(r->reg >= ARRAY_SIZE(vcpu->arch.ctxt.cp15)); in reset_unknown()
78 vcpu_cp15(vcpu, r->reg) = 0xdecafbad; in reset_unknown()
81 static inline void reset_val(struct kvm_vcpu *vcpu, const struct coproc_reg *r) in reset_val() argument
83 BUG_ON(!r->reg); in reset_val()
84 BUG_ON(r->reg >= ARRAY_SIZE(vcpu->arch.ctxt.cp15)); in reset_val()
85 vcpu_cp15(vcpu, r->reg) = r->val; in reset_val()
89 const struct coproc_reg *r) in reset_unknown64() argument
91 BUG_ON(!r->reg); in reset_unknown64()
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