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/arch/arm64/boot/dts/intel/
Dsocfpga_agilex.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
90 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
105 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
120 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
134 resets = <&rst GPIO0_RESET>;
154 resets = <&rst GPIO1_RESET>;
175 resets = <&rst I2C0_RESET>;
185 resets = <&rst I2C1_RESET>;
195 resets = <&rst I2C2_RESET>;
205 resets = <&rst I2C3_RESET>;
[all …]
/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
146 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
164 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
182 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
199 resets = <&rst GPIO0_RESET>;
219 resets = <&rst GPIO1_RESET>;
240 resets = <&rst I2C0_RESET>;
251 resets = <&rst I2C1_RESET>;
262 resets = <&rst I2C2_RESET>;
273 resets = <&rst I2C3_RESET>;
[all …]
/arch/mips/boot/dts/qca/
Dar9331.dtsi111 rst: reset-controller@1806001c { label
124 resets = <&rst 9>, <&rst 22>;
137 resets = <&rst 13>, <&rst 23>;
150 resets = <&rst 5>;
176 resets = <&rst 4>, <&rst 3>;
Dar9132.dtsi123 rst: reset-controller@1806001c { label
137 resets = <&rst 5>;
165 resets = <&rst 4>, <&rst 3>;
/arch/arm/boot/dts/
Dsocfpga_arria10.dtsi7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
71 resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>;
436 resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
456 resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
476 resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
487 resets = <&rst GPIO0_RESET>;
507 resets = <&rst GPIO1_RESET>;
527 resets = <&rst GPIO2_RESET>;
547 resets = <&rst FPGAMGR_RESET>;
558 resets = <&rst I2C0_RESET>;
[all …]
Dsocfpga.dtsi6 #include <dt-bindings/reset/altr,rst-mgr.h>
87 resets = <&rst DMA_RESET>;
105 resets = <&rst CAN0_RESET>;
114 resets = <&rst CAN1_RESET>;
532 resets = <&rst LWHPS2FPGA_RESET>;
539 resets = <&rst HPS2FPGA_RESET>;
559 resets = <&rst EMAC0_RESET>;
577 resets = <&rst EMAC1_RESET>;
592 resets = <&rst GPIO0_RESET>;
613 resets = <&rst GPIO1_RESET>;
[all …]
Drk3288-veyron-tiger.dts114 touch_rst: touch-rst {
Dstih407-family.dtsi421 reset-names = "miphy-sw-rst";
437 reset-names = "miphy-sw-rst";
451 reset-names = "miphy-sw-rst";
632 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
656 "sw-rst",
657 "pwr-rst";
Dimx7ulp-evk.dts127 pinctrl_usdhc0_rst: usdhc0-gpio-rst-grp {
Drk3066a-rayeager.dts330 rmii_rst: rmii-rst {
364 hub_rst: hub-rst {
/arch/mips/txx9/generic/
Dsetup_tx4939.c519 __u64 pcfg, rst = 0, ckd = 0; in tx4939_stop_unused_modules() local
527 rst |= TX4939_CLKCTR_ACLRST; in tx4939_stop_unused_modules()
535 rst |= TX4939_CLKCTR_I2SRST; in tx4939_stop_unused_modules()
540 rst |= TX4939_CLKCTR_ATA0RST; in tx4939_stop_unused_modules()
545 rst |= TX4939_CLKCTR_ATA1RST; in tx4939_stop_unused_modules()
550 rst |= TX4939_CLKCTR_SPIRST; in tx4939_stop_unused_modules()
555 rst |= TX4939_CLKCTR_VPCRST; in tx4939_stop_unused_modules()
560 rst |= TX4939_CLKCTR_SIO2RST; in tx4939_stop_unused_modules()
565 rst |= TX4939_CLKCTR_SIO3RST; in tx4939_stop_unused_modules()
569 if (rst | ckd) { in tx4939_stop_unused_modules()
[all …]
Dsetup_tx4938.c433 __u64 pcfg, rst = 0, ckd = 0; in tx4938_stop_unused_modules() local
442 rst |= TX4938_CLKCTR_ACLRST; in tx4938_stop_unused_modules()
450 rst |= TX4938_CLKCTR_ACLRST; in tx4938_stop_unused_modules()
458 rst |= TX4938_CLKCTR_NDFRST; in tx4938_stop_unused_modules()
463 rst |= TX4938_CLKCTR_SPIRST; in tx4938_stop_unused_modules()
469 if (rst | ckd) { in tx4938_stop_unused_modules()
470 txx9_set64(&tx4938_ccfgptr->clkctr, rst); in tx4938_stop_unused_modules()
Dsetup_tx4927.c310 __u64 pcfg, rst = 0, ckd = 0; in tx4927_stop_unused_modules() local
317 rst |= TX4927_CLKCTR_ACLRST; in tx4927_stop_unused_modules()
321 if (rst | ckd) { in tx4927_stop_unused_modules()
322 txx9_set64(&tx4927_ccfgptr->clkctr, rst); in tx4927_stop_unused_modules()
/arch/arm/mach-omap2/
Dprm2xxx_3xxx.c85 u32 rst, st; in omap2_prm_deassert_hardreset() local
88 rst = 1 << rst_shift; in omap2_prm_deassert_hardreset()
92 if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0) in omap2_prm_deassert_hardreset()
98 omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL); in omap2_prm_deassert_hardreset()
/arch/arm64/boot/dts/bitmain/
Dbm1880.dtsi97 rst: reset-controller@c00 { label
164 resets = <&rst BM1880_RST_UART0_1_CLK>;
174 resets = <&rst BM1880_RST_UART0_1_ACLK>;
184 resets = <&rst BM1880_RST_UART2_3_CLK>;
194 resets = <&rst BM1880_RST_UART2_3_ACLK>;
/arch/microblaze/
DKconfig.debug3 # see Documentation/kbuild/kconfig-language.rst.
DKconfig.platform3 # see Documentation/kbuild/kconfig-language.rst.
/arch/mips/lasat/
Dds1603.h14 u32 rst; member
Dds1603.c44 rtc_reg_write(rtc_reg_read() | ds1603->rst); in rtc_nrst_high()
49 rtc_reg_write(rtc_reg_read() & ~ds1603->rst); in rtc_nrst_low()
/arch/arm/mach-ixp4xx/
DKconfig36 see <file:Documentation/arm/ixp4xx.rst>.
52 information on this platform, see <file:Documentation/arm/ixp4xx.rst>.
75 For more information on this platform, see <file:Documentation/arm/ixp4xx.rst>.
82 For more information on this platform, see <file:Documentation/arm/ixp4xx.rst>.
89 For more information on this platform, see <file:Documentation/arm/ixp4xx.rst>.
102 For more information on this platform, see <file:Documentation/arm/ixp4xx.rst>.
119 this platform, see <file:Documentation/arm/ixp4xx.rst>.
/arch/powerpc/sysdev/
DKconfig3 # see Documentation/kbuild/kconfig-language.rst.
/arch/nds32/
DKconfig4 # see Documentation/kbuild/kconfig-language.rst.
/arch/arm/plat-samsung/
DKconfig246 Resume code. See <file:Documentation/arm/samsung-s3c24xx/suspend.rst>
271 See <file:Documentation/arm/samsung-s3c24xx/suspend.rst>
283 See <file:Documentation/arm/samsung-s3c24xx/suspend.rst>
/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi534 port-rst-offset = <0>;
542 port-rst-offset = <1>;
551 port-rst-offset = <4>;
560 port-rst-offset = <5>;
/arch/arc/plat-eznps/
DKconfig4 # see Documentation/kbuild/kconfig-language.rst.

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