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Searched refs:CPG_PLL_CONFIG_INDEX (Results 1 – 17 of 17) sorted by relevance

/drivers/clk/renesas/
Dr8a77470-cpg-mssr.c184 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 13) | \ macro
205 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77470_cpg_mssr_init()
Dr8a7792-cpg-mssr.c179 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
203 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7792_cpg_mssr_init()
Dr8a77995-cpg-mssr.c198 #define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19) macro
216 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77995_cpg_mssr_init()
Dr8a77970-cpg-mssr.c189 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
217 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77970_cpg_mssr_init()
Dr8a77980-cpg-mssr.c200 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 13) | \ macro
221 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77980_cpg_mssr_init()
Dr8a7745-cpg-mssr.c201 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 13) | \ macro
222 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7745_cpg_mssr_init()
Dr8a7794-cpg-mssr.c211 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 13) | \ macro
230 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7794_cpg_mssr_init()
Dr8a7743-cpg-mssr.c220 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
248 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7743_cpg_mssr_init()
Dr8a7791-cpg-mssr.c233 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
253 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7791_cpg_mssr_init()
Dr8a7790-cpg-mssr.c235 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
253 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7790_cpg_mssr_init()
Dr8a774c0-cpg-mssr.c254 #define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19) macro
272 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774c0_cpg_mssr_init()
Dr8a77990-cpg-mssr.c259 #define CPG_PLL_CONFIG_INDEX(md) (((md) & BIT(19)) >> 19) macro
277 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77990_cpg_mssr_init()
Dr8a774a1-cpg-mssr.c268 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \ macro
303 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a774a1_cpg_mssr_init()
Dr8a7796-cpg-mssr.c282 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \ macro
317 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7796_cpg_mssr_init()
Dr8a77965-cpg-mssr.c284 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \ macro
319 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a77965_cpg_mssr_init()
Dclk-rcar-gen2.c265 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 12) | \ macro
435 config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in rcar_gen2_cpg_clocks_init()
Dr8a7795-cpg-mssr.c311 #define CPG_PLL_CONFIG_INDEX(md) ((((md) & BIT(14)) >> 11) | \ macro
436 cpg_pll_config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in r8a7795_cpg_mssr_init()