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Searched refs:FLUSH (Results 1 – 13 of 13) sorted by relevance

/drivers/scsi/
Da2091.h47 volatile unsigned short FLUSH; member
Da3000.h39 volatile unsigned short FLUSH; member
Dmac53c94.c114 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in DEF_SCSI_QCMD()
140 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in mac53c94_init()
Da3000.c128 regs->FLUSH = 1; in dma_stop()
Da2091.c126 regs->FLUSH = 1; in dma_stop()
Dmesh.c367 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ in mesh_init()
1716 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ in mesh_host_reset()
/drivers/net/ethernet/apple/
Dbmac.c190 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)); in dbdma_reset()
483 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
484 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
1407 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1408 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1497 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
1503 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
Dmace.c306 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); in dbdma_reset()
472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_open()
482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); in mace_open()
510 rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
511 td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
/drivers/ata/
Dpata_macio.c582 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control); in pata_macio_freeze()
691 writel((FLUSH << 16) | FLUSH, &dma_regs->control); in pata_macio_bmdma_status()
695 if ((dstat & FLUSH) == 0) in pata_macio_bmdma_status()
/drivers/ide/
Dpmac.c1467 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control); in pmac_ide_build_dmatable()
1629 writel((FLUSH << 16) | FLUSH, &dma->control); in pmac_ide_dma_test_irq()
1634 if ((status & FLUSH) == 0) in pmac_ide_dma_test_irq()
/drivers/video/fbdev/i810/
Di810.h71 #define FLUSH (0x04 << 23) macro
Di810_accel.c262 PUT_RING(PARSER | FLUSH); in load_front()
/drivers/gpu/drm/msm/
DNOTES23 up gpu cmdstream to update scanout and write FLUSH register after).