Searched refs:__clk_get_hw (Results 1 – 25 of 32) sorted by relevance
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| /drivers/clk/ |
| D | clkdev.c | 131 cl->clk_hw = __clk_get_hw(cl->clk); in clkdev_add()
140 cl->clk_hw = __clk_get_hw(cl->clk); in clkdev_add_table()
200 cl = vclkdev_alloc(__clk_get_hw(clk), con_id, dev_fmt, ap); in clkdev_alloc()
237 cl = vclkdev_create(__clk_get_hw(clk), con_id, dev_fmt, ap); in clkdev_create()
349 return do_clk_register_clkdev(__clk_get_hw(clk), &cl, con_id, in clk_register_clkdev()
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| D | clk-fixed-rate.c | 137 hw = __clk_get_hw(clk); in clk_unregister_fixed_rate()
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| D | clk-gate.c | 203 hw = __clk_get_hw(clk); in clk_unregister_gate()
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| D | clk-fixed-factor.c | 136 hw = __clk_get_hw(clk); in clk_unregister_fixed_factor()
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| D | clk-mux.c | 252 hw = __clk_get_hw(clk); in clk_unregister_mux()
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| D | clk-composite.c | 337 hw = __clk_get_hw(clk); in clk_unregister_composite()
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| /drivers/clk/sunxi-ng/ |
| D | ccu_mmc_timing.c | 22 struct clk_hw *hw = __clk_get_hw(clk); in sunxi_ccu_set_mmc_timing_mode()
55 struct clk_hw *hw = __clk_get_hw(clk); in sunxi_ccu_get_mmc_timing_mode()
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| /drivers/clk/imx/ |
| D | clk.c | 94 return __clk_get_hw(clk); in imx_obtain_fixed_clock_hw()
106 return __clk_get_hw(clk); in imx_obtain_fixed_clk_hw()
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| D | clk-imx6sx.c | 142 hws[IMX6SX_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6sx_clocks_init()
143 hws[IMX6SX_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6sx_clocks_init()
146 hws[IMX6SX_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6sx_clocks_init()
147 hws[IMX6SX_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6sx_clocks_init()
150 hws[IMX6SX_CLK_ANACLK1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "anaclk1")); in imx6sx_clocks_init()
151 hws[IMX6SX_CLK_ANACLK2] = __clk_get_hw(of_clk_get_by_name(ccm_node, "anaclk2")); in imx6sx_clocks_init()
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| D | clk-imx6sll.c | 110 hws[IMX6SLL_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6sll_clocks_init()
111 hws[IMX6SLL_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6sll_clocks_init()
114 hws[IMX6SLL_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6sll_clocks_init()
115 hws[IMX6SLL_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6sll_clocks_init()
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| D | clk-imx6ul.c | 129 hws[IMX6UL_CLK_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx6ul_clocks_init()
130 hws[IMX6UL_CLK_OSC] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx6ul_clocks_init()
133 hws[IMX6UL_CLK_IPP_DI0] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di0")); in imx6ul_clocks_init()
134 hws[IMX6UL_CLK_IPP_DI1] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ipp_di1")); in imx6ul_clocks_init()
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| D | clk-imx7d.c | 406 hws[IMX7D_OSC_24M_CLK] = __clk_get_hw(of_clk_get_by_name(ccm_node, "osc")); in imx7d_clocks_init()
407 hws[IMX7D_CKIL] = __clk_get_hw(of_clk_get_by_name(ccm_node, "ckil")); in imx7d_clocks_init()
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| /drivers/clk/ti/ |
| D | autoidle.c | 85 struct clk_hw *hw = __clk_get_hw(clk); in omap2_clk_deny_idle()
104 struct clk_hw *hw = __clk_get_hw(clk); in omap2_clk_allow_idle()
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| D | clk-dra7-atl.c | 265 cdesc = to_atl_desc(__clk_get_hw(clk)); in of_dra7_atl_clk_probe()
293 atl_clk_enable(__clk_get_hw(clk)); in of_dra7_atl_clk_probe()
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| D | clockdomain.c | 145 clk_hw = __clk_get_hw(clk); in of_ti_clockdomain_setup()
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| D | apll.c | 155 ad->clk_ref = __clk_get_hw(clk); in omap_clk_register_apll()
167 ad->clk_bypass = __clk_get_hw(clk); in omap_clk_register_apll()
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| D | dpll.c | 180 dd->clk_ref = __clk_get_hw(clk); in _register_dpll()
193 dd->clk_bypass = __clk_get_hw(clk); in _register_dpll()
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| /drivers/clk/davinci/ |
| D | psc.c | 293 struct clk_hw *hw = __clk_get_hw(clk); in davinci_lpsc_clk_reset()
342 hw = __clk_get_hw(clk); in davinci_psc_reset_of_xlate()
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| D | pll.c | 310 struct clk_hw *hw = __clk_get_hw(cnd->clk); in davinci_pllen_rate_change()
644 struct clk_hw *hw = __clk_get_hw(clk_get_parent(cnd->clk)); in davinci_pll_sysclk_rate_change()
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| /drivers/clk/mvebu/ |
| D | kirkwood.c | 281 to_clk_mux(__clk_get_hw(ctrl->muxes[n])); in clk_muxing_get_src()
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| D | common.c | 211 to_clk_gate(__clk_get_hw(ctrl->gates[n])); in clk_gating_get_src()
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| /drivers/cpufreq/ |
| D | qoriq-cpufreq.c | 186 hwclk = __clk_get_hw(policy->clk); in qoriq_cpufreq_cpu_init()
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| /drivers/clk/sunxi/ |
| D | clk-factors.c | 290 struct clk_hw *hw = __clk_get_hw(clk); in sunxi_factors_unregister()
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| /drivers/clk/samsung/ |
| D | clk-cpu.c | 433 cpuclk->alt_parent = __clk_get_hw(__clk_lookup(alt_parent)); in exynos_register_cpu_clock()
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| /drivers/clk/tegra/ |
| D | clk-emc.c | 264 clk_hw_reparent(&tegra->hw, __clk_get_hw(timing->parent)); in emc_set_timing()
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