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Searched refs:amdgpu_sriov_vf (Results 1 – 25 of 45) sorted by relevance

12

/drivers/gpu/drm/amd/amdgpu/
Dvega10_ih.c53 if (amdgpu_sriov_vf(adev)) { in vega10_ih_enable_interrupts()
67 if (amdgpu_sriov_vf(adev)) { in vega10_ih_enable_interrupts()
83 if (amdgpu_sriov_vf(adev)) { in vega10_ih_enable_interrupts()
109 if (amdgpu_sriov_vf(adev)) { in vega10_ih_disable_interrupts()
128 if (amdgpu_sriov_vf(adev)) { in vega10_ih_disable_interrupts()
148 if (amdgpu_sriov_vf(adev)) { in vega10_ih_disable_interrupts()
247 if (amdgpu_sriov_vf(adev)) { in vega10_ih_irq_init()
286 if (amdgpu_sriov_vf(adev)) { in vega10_ih_irq_init()
313 if (amdgpu_sriov_vf(adev)) { in vega10_ih_irq_init()
517 if (amdgpu_sriov_vf(adev)) in vega10_ih_set_rptr()
Dmmhub_v1_0.c117 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_init_system_aperture_regs()
165 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_init_cache_regs()
214 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_disable_identity_aperture()
298 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_update_power_gating()
310 if (amdgpu_sriov_vf(adev)) { in mmhub_v1_0_gart_enable()
354 if (!amdgpu_sriov_vf(adev)) { in mmhub_v1_0_gart_disable()
373 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_set_fault_enable_default()
518 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_set_clockgating()
543 if (amdgpu_sriov_vf(adev)) in mmhub_v1_0_get_clockgating()
Dsoc15.c686 if (amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
697 if (amdgpu_sriov_vf(adev)) { in soc15_set_ip_blocks()
716 if (!amdgpu_sriov_vf(adev)) { in soc15_set_ip_blocks()
722 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
728 if (!(adev->asic_type == CHIP_VEGA20 && amdgpu_sriov_vf(adev))) { in soc15_set_ip_blocks()
742 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
754 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
771 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in soc15_set_ip_blocks()
1195 if (amdgpu_sriov_vf(adev)) { in soc15_common_early_init()
1207 if (amdgpu_sriov_vf(adev)) in soc15_common_late_init()
[all …]
Damdgpu_psp.c266 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; in psp_tmr_init()
342 if (amdgpu_sriov_vf(psp->adev)) in psp_asd_load()
430 if (amdgpu_sriov_vf(psp->adev)) in psp_xgmi_load()
472 if (amdgpu_sriov_vf(psp->adev)) in psp_xgmi_unload()
507 if (amdgpu_sriov_vf(psp->adev)) in psp_xgmi_invoke()
615 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_load()
657 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_unload()
692 if (amdgpu_sriov_vf(psp->adev)) in psp_ras_invoke()
780 if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) { in psp_hw_start()
1058 if (amdgpu_sriov_vf(adev) && in psp_np_fw_load()
[all …]
Dathub_v1_0.c68 if (amdgpu_sriov_vf(adev)) in athub_v1_0_set_clockgating()
92 if (amdgpu_sriov_vf(adev)) in athub_v1_0_get_clockgating()
Dvi.c277 if (amdgpu_sriov_vf(adev)) { in vi_init_golden_registers()
1266 if (amdgpu_sriov_vf(adev)) { in vi_common_early_init()
1278 if (amdgpu_sriov_vf(adev)) in vi_common_late_init()
1288 if (amdgpu_sriov_vf(adev)) in vi_common_sw_init()
1322 if (amdgpu_sriov_vf(adev)) in vi_common_hw_fini()
1573 if (amdgpu_sriov_vf(adev)) in vi_common_set_clockgating_state()
1621 if (amdgpu_sriov_vf(adev)) in vi_common_get_clockgating_state()
1677 if (amdgpu_sriov_vf(adev)) in vi_set_ip_blocks()
1699 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in vi_set_ip_blocks()
1707 if (!amdgpu_sriov_vf(adev)) { in vi_set_ip_blocks()
[all …]
Damdgpu_vf_error.c36 if (!amdgpu_sriov_vf(adev)) in amdgpu_vf_error_put()
57 if ((NULL == adev) || (!amdgpu_sriov_vf(adev)) || in amdgpu_vf_error_trans_all()
Dgmc_v9_0.c358 if (!amdgpu_sriov_vf(adev)) { in gmc_v9_0_process_interrupt()
386 if (!amdgpu_sriov_vf(adev)) { in gmc_v9_0_process_interrupt()
463 (!amdgpu_sriov_vf(adev)) && in gmc_v9_0_use_invalidate_semaphore()
502 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) && in gmc_v9_0_flush_gpu_tlb()
980 if (!amdgpu_sriov_vf(adev)) { in gmc_v9_0_late_init()
1019 else if (!amdgpu_sriov_vf(adev)) in gmc_v9_0_vram_gtt_location()
1049 if (amdgpu_sriov_vf(adev)) { in gmc_v9_0_mc_init()
1222 if (amdgpu_sriov_vf(adev)) in gmc_v9_0_sw_init()
1361 if (amdgpu_sriov_vf(adev)) in gmc_v9_0_init_golden_registers()
1502 if (amdgpu_sriov_vf(adev)) { in gmc_v9_0_hw_fini()
Damdgpu_device.c763 if (amdgpu_sriov_vf(adev)) in amdgpu_device_resize_fb_bar()
829 if (amdgpu_sriov_vf(adev)) in amdgpu_device_need_post()
1618 if (amdgpu_sriov_vf(adev)) { in amdgpu_device_ip_early_init()
1625 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_early_init()
1680 (amdgpu_sriov_vf(adev) && (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP)) || in amdgpu_device_ip_hw_init_phase1()
1807 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { in amdgpu_device_ip_init()
1847 if (amdgpu_sriov_vf(adev)) { in amdgpu_device_ip_init()
2128 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_fini()
2269 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend()
2277 if (amdgpu_sriov_vf(adev)) in amdgpu_device_ip_suspend()
[all …]
Damdgpu_ib.c175 (amdgpu_sriov_vf(adev) && need_ctx_switch) || in amdgpu_ib_schedule()
227 !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */ in amdgpu_ib_schedule()
337 if (amdgpu_sriov_vf(adev)) { in amdgpu_ib_ring_tests()
Dmmhub_v2_0.c243 if (amdgpu_sriov_vf(adev)) { in mmhub_v2_0_gart_enable()
415 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_set_clockgating()
438 if (amdgpu_sriov_vf(adev)) in mmhub_v2_0_get_clockgating()
Damdgpu_ucode.c555 amdgpu_sriov_vf(adev) ? AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT, in amdgpu_ucode_create_bo()
562 } else if (amdgpu_sriov_vf(adev)) { in amdgpu_ucode_create_bo()
584 if (!amdgpu_sriov_vf(adev) && (adev->in_gpu_reset || adev->in_suspend)) in amdgpu_ucode_init_bo()
591 if (amdgpu_sriov_vf(adev)) in amdgpu_ucode_init_bo()
Dathub_v2_0.c72 if (amdgpu_sriov_vf(adev)) in athub_v2_0_set_clockgating()
Dsdma_v5_0.c668 if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */ in sdma_v5_0_gfx_resume()
689 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_gfx_resume()
716 if (!amdgpu_sriov_vf(adev)) { in sdma_v5_0_gfx_resume()
737 if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */ in sdma_v5_0_gfx_resume()
824 if (amdgpu_sriov_vf(adev)) { in sdma_v5_0_start()
1279 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_hw_fini()
1523 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_set_clockgating_state()
1553 if (amdgpu_sriov_vf(adev)) in sdma_v5_0_get_clockgating_state()
Dgmc_v10_0.c138 if (!amdgpu_sriov_vf(adev)) { in gmc_v10_0_process_interrupt()
166 if (!amdgpu_sriov_vf(adev)) { in gmc_v10_0_process_interrupt()
578 if (!amdgpu_sriov_vf(adev)) in gmc_v10_0_vram_gtt_location()
905 if (amdgpu_sriov_vf(adev)) { in gmc_v10_0_hw_fini()
Dnv.c440 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in nv_set_ip_blocks()
463 if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) in nv_set_ip_blocks()
852 if (amdgpu_sriov_vf(adev)) in nv_common_set_clockgating_state()
886 if (amdgpu_sriov_vf(adev)) in nv_common_get_clockgating_state()
Dsdma_v4_0.c1046 F32_POLL_ENABLE, amdgpu_sriov_vf(adev)? 1 : 0); in sdma_v4_0_gfx_resume()
1137 F32_POLL_ENABLE, amdgpu_sriov_vf(adev)? 1 : 0); in sdma_v4_0_page_resume()
1290 if (amdgpu_sriov_vf(adev)) { in sdma_v4_0_start()
1321 if (!amdgpu_sriov_vf(adev)) { in sdma_v4_0_start()
1329 if (amdgpu_sriov_vf(adev)) { in sdma_v4_0_start()
1680 if ((adev->asic_type == CHIP_VEGA10) && amdgpu_sriov_vf((adev))) in sdma_v4_0_early_init()
1898 if (!amdgpu_sriov_vf(adev)) in sdma_v4_0_hw_init()
1911 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_hw_fini()
2179 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_set_clockgating_state()
2222 if (amdgpu_sriov_vf(adev)) in sdma_v4_0_get_clockgating_state()
Duvd_v7_0.c182 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_enc_ring_test_ring()
392 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_early_init()
450 if (!amdgpu_sriov_vf(adev)) { in uvd_v7_0_sw_init()
461 if (amdgpu_sriov_vf(adev)) { in uvd_v7_0_sw_init()
527 if (amdgpu_sriov_vf(adev)) in uvd_v7_0_hw_init()
539 if (!amdgpu_sriov_vf(adev)) { in uvd_v7_0_hw_init()
603 if (!amdgpu_sriov_vf(adev)) in uvd_v7_0_hw_fini()
1568 if (!amdgpu_sriov_vf(adev)) in uvd_v7_0_process_interrupt()
Damdgpu_virt.c273 if (!amdgpu_sriov_vf(adev) || adev->virt.mm_table.gpu_addr) in amdgpu_virt_alloc_mm_table()
300 if (!amdgpu_sriov_vf(adev) || !adev->virt.mm_table.gpu_addr) in amdgpu_virt_free_mm_table()
Dmmhub_v9_4.c357 if (amdgpu_sriov_vf(adev)) { in mmhub_v9_4_gart_enable()
614 if (amdgpu_sriov_vf(adev)) in mmhub_v9_4_set_clockgating()
635 if (amdgpu_sriov_vf(adev)) in mmhub_v9_4_get_clockgating()
Dvce_v4_0.c413 if (amdgpu_sriov_vf(adev)) /* currently only VCN0 support SRIOV */ in vce_v4_0_early_init()
467 if (amdgpu_sriov_vf(adev)) { in vce_v4_0_sw_init()
521 if (amdgpu_sriov_vf(adev)) in vce_v4_0_hw_init()
544 if (!amdgpu_sriov_vf(adev)) { in vce_v4_0_hw_fini()
1016 if (!amdgpu_sriov_vf(adev)) { in vce_v4_0_set_interrupt_state()
Damdgpu_fence.c473 if (!amdgpu_sriov_vf(ring->adev)) in amdgpu_fence_driver_init_ring()
771 if (amdgpu_sriov_vf(adev)) in amdgpu_debugfs_fence_init()
Damdgpu_kms.c91 if (amdgpu_sriov_vf(adev)) in amdgpu_driver_unload_kms()
685 } else if (amdgpu_sriov_vf(adev) && amdgim_is_hwperf(adev) && in amdgpu_info_ioctl()
701 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) in amdgpu_info_ioctl()
1001 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { in amdgpu_driver_open_kms()
1064 if (amdgpu_mcbp || amdgpu_sriov_vf(adev)) { in amdgpu_driver_postclose_kms()
Dgmc_v8_0.c435 if (!amdgpu_sriov_vf(adev)) in gmc_v8_0_vram_gtt_location()
488 if (amdgpu_sriov_vf(adev)) { in gmc_v8_0_mc_program()
1421 if (amdgpu_sriov_vf(adev)) { in gmc_v8_0_process_interrupt()
1648 if (amdgpu_sriov_vf(adev)) in gmc_v8_0_set_clockgating_state()
1675 if (amdgpu_sriov_vf(adev)) in gmc_v8_0_get_clockgating_state()
Damdgpu_vce.c361 if (amdgpu_sriov_vf(adev)) in amdgpu_vce_ring_begin_use()
390 if (!amdgpu_sriov_vf(ring->adev)) in amdgpu_vce_ring_end_use()
1081 if (amdgpu_sriov_vf(adev)) in amdgpu_vce_ring_test_ring()

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