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Searched refs:banks (Results 1 – 25 of 48) sorted by relevance

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/drivers/pinctrl/qcom/
Dpinctrl-ssbi-gpio.c328 u8 banks = 0; in pm8xxx_pin_config_set() local
338 banks |= BIT(2); in pm8xxx_pin_config_set()
340 banks |= BIT(3); in pm8xxx_pin_config_set()
344 banks |= BIT(2); in pm8xxx_pin_config_set()
346 banks |= BIT(3); in pm8xxx_pin_config_set()
357 banks |= BIT(2); in pm8xxx_pin_config_set()
359 banks |= BIT(3); in pm8xxx_pin_config_set()
363 banks |= BIT(3); in pm8xxx_pin_config_set()
367 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
372 banks |= BIT(0) | BIT(1); in pm8xxx_pin_config_set()
[all …]
/drivers/memory/
Dfsl_ifc.c54 for (i = 0; i < fsl_ifc_ctrl_dev->banks; i++) { in fsl_ifc_find()
206 int version, banks; in fsl_ifc_ctrl_probe() local
236 banks = (version == FSL_IFC_VERSION_1_0_0) ? 4 : 8; in fsl_ifc_ctrl_probe()
238 version >> 24, (version >> 16) & 0xf, banks); in fsl_ifc_ctrl_probe()
241 fsl_ifc_ctrl_dev->banks = banks; in fsl_ifc_ctrl_probe()
/drivers/crypto/qat/qat_common/
Dadf_isr.c175 struct adf_etr_bank_data *bank = &etr_data->banks[i]; in adf_request_irqs()
222 free_irq(msixe[i].vector, &etr_data->banks[i]); in adf_free_irqs()
286 tasklet_init(&priv_data->banks[i].resp_handler, in adf_setup_bh()
288 (unsigned long)&priv_data->banks[i]); in adf_setup_bh()
299 tasklet_disable(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
300 tasklet_kill(&priv_data->banks[i].resp_handler); in adf_cleanup_bh()
Dadf_vf_isr.c224 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr()
262 tasklet_init(&priv_data->banks[0].resp_handler, adf_response_handler, in adf_setup_bh()
263 (unsigned long)priv_data->banks); in adf_setup_bh()
271 tasklet_disable(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
272 tasklet_kill(&priv_data->banks[0].resp_handler); in adf_cleanup_bh()
Dadf_transport.c271 bank = &transport_data->banks[bank_num]; in adf_create_ring()
475 etr_data->banks = kzalloc_node(size, GFP_KERNEL, in adf_init_etr_data()
477 if (!etr_data->banks) { in adf_init_etr_data()
491 ret = adf_init_bank(accel_dev, &etr_data->banks[i], i, in adf_init_etr_data()
501 kfree(etr_data->banks); in adf_init_etr_data()
534 cleanup_bank(&etr_data->banks[i]); in adf_cleanup_etr_handles()
554 kfree(etr_data->banks); in adf_cleanup_etr_data()
Dadf_hw_arbiter.c82 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb()
125 csr = accel_dev->transport->banks[0].csr_addr; in adf_exit_arb()
Dadf_transport_internal.h90 struct adf_etr_bank_data *banks; member
Dqat_crypto.c163 int banks = GET_MAX_BANKS(accel_dev); in qat_crypto_dev_config() local
164 int instances = min(cpus, banks); in qat_crypto_dev_config()
/drivers/phy/mediatek/
DKconfig13 different banks layout, the T-PHY with shared banks between
15 so you can easily distinguish them by banks layout.
/drivers/pinctrl/vt8500/
Dpinctrl-wmt.c89 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux()
90 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux()
426 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set()
427 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set()
485 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction()
498 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value()
514 u32 reg_data_out = data->banks[bank].reg_data_out; in wmt_gpio_set_value()
Dpinctrl-wmt.h57 const struct wmt_pinctrl_bank_registers *banks; member
/drivers/clk/tegra/
Dclk.c202 struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) in tegra_clk_init() argument
206 if (WARN_ON(banks > ARRAY_SIZE(periph_regs))) in tegra_clk_init()
209 periph_clk_enb_refcnt = kcalloc(32 * banks, in tegra_clk_init()
215 periph_banks = banks; in tegra_clk_init()
/drivers/gpio/
Dgpio-pxa.c82 struct pxa_gpio_bank *banks; member
151 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++)
163 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base()
171 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank()
352 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip()
354 if (!pchip->banks) in pxa_init_gpio_chip()
377 bank = pchip->banks + i; in pxa_init_gpio_chip()
Dgpio-bcm-kona.c73 struct bcm_kona_gpio_bank *banks; member
599 kona_gpio->banks = devm_kcalloc(dev, in bcm_kona_gpio_probe()
601 sizeof(*kona_gpio->banks), in bcm_kona_gpio_probe()
603 if (!kona_gpio->banks) in bcm_kona_gpio_probe()
627 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
648 bank = &kona_gpio->banks[i]; in bcm_kona_gpio_probe()
Dgpio-aspeed.c665 unsigned int i, p, girq, banks; in aspeed_gpio_irq_handler() local
671 banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); in aspeed_gpio_irq_handler()
672 for (i = 0; i < banks; i++) { in aspeed_gpio_irq_handler()
1143 int rc, i, banks, err; in aspeed_gpio_probe() local
1186 banks = DIV_ROUND_UP(gpio->chip.ngpio, 32); in aspeed_gpio_probe()
1188 banks, sizeof(u32), GFP_KERNEL); in aspeed_gpio_probe()
1196 for (i = 0; i < banks; i++) { in aspeed_gpio_probe()
/drivers/pinctrl/stm32/
Dpinctrl-stm32.c104 struct stm32_gpio_bank *banks; member
1148 struct stm32_gpio_bank *bank = &pctl->banks[pctl->nbanks]; in stm32_gpiolib_register_bank()
1198 &pctl->banks[bank_nr].range); in stm32_gpiolib_register_bank()
1367 int i, ret, hwlock_id, banks = 0; in stm32_pctl_probe() local
1458 banks++; in stm32_pctl_probe()
1460 if (!banks) { in stm32_pctl_probe()
1464 pctl->banks = devm_kcalloc(dev, banks, sizeof(*pctl->banks), in stm32_pctl_probe()
1466 if (!pctl->banks) in stm32_pctl_probe()
/drivers/pinctrl/
Dpinctrl-st.c324 struct st_gpio_bank *banks; member
1142 struct st_pio_control *pc = &info->banks[bank].pc; in st_parse_syscfgs()
1445 __gpio_irq_handler(&info->banks[n]); in st_gpio_irqmux_handler()
1475 struct st_gpio_bank *bank = &info->banks[bank_nr]; in st_gpiolib_register_bank()
1588 info->banks = devm_kcalloc(&pdev->dev, in st_pctl_probe_dt()
1589 info->nbanks, sizeof(*info->banks), GFP_KERNEL); in st_pctl_probe_dt()
1591 if (!info->functions || !info->groups || !info->banks) in st_pctl_probe_dt()
1634 k = info->banks[bank].range.pin_base; in st_pctl_probe_dt()
1635 bank_name = info->banks[bank].range.name; in st_pctl_probe_dt()
1696 pinctrl_add_gpio_range(info->pctl, &info->banks[i].range); in st_pctl_probe()
/drivers/pinctrl/samsung/
Dpinctrl-exynos.h130 struct samsung_pin_bank *banks[]; member
/drivers/pinctrl/meson/
Dpinctrl-meson.c74 if (pin >= pc->data->banks[i].first && in meson_get_bank()
75 pin <= pc->data->banks[i].last) { in meson_get_bank()
76 *bank = &pc->data->banks[i]; in meson_get_bank()
Dpinctrl-meson.h113 struct meson_bank *banks; member
Dpinctrl-meson-gxl.c804 .banks = meson_gxl_periphs_banks,
817 .banks = meson_gxl_aobus_banks,
/drivers/edac/
Dskx_common.c289 int banks = 16, ranks, rows, cols, npages; in skx_get_dimm_info() local
299 size = ((1ull << (rows + cols + ranks)) * banks) >> (20 - 3); in skx_get_dimm_info()
304 banks, 1 << ranks, rows, cols); in skx_get_dimm_info()
Di7core_edac.c418 static const int banks[] = { 4, 8, 16, -EINVAL }; in numbank() local
420 return banks[bank & 0x3]; in numbank()
582 u32 banks, ranks, rows, cols; in get_dimm_config() local
590 banks = numbank(MC_DOD_NUMBANK(dimm_dod[j])); in get_dimm_config()
596 size = (rows * cols * banks * ranks) >> (20 - 3); in get_dimm_config()
601 banks, ranks, rows, cols); in get_dimm_config()
607 switch (banks) { in get_dimm_config()
/drivers/thermal/
Dmtk_thermal.c266 struct mtk_thermal_bank banks[MAX_NUM_ZONES]; member
623 struct mtk_thermal_bank *bank = &mt->banks[i]; in mtk_read_temp()
645 struct mtk_thermal_bank *bank = &mt->banks[num]; in mtk_thermal_init_bank()
/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramnv50.c508 int colbits, rowbitsa, rowbitsb, banks; in nv50_fb_vram_rblock() local
521 banks = 1 << (((r4 & 0x03000000) >> 24) + 2); in nv50_fb_vram_rblock()
523 rowsize = ram->parts * banks * (1 << colbits) * 8; in nv50_fb_vram_rblock()

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