Searched refs:configuring (Results 1 – 23 of 23) sorted by relevance
32 allows configuring of SoC pins and using them as GPIOs.42 interface that allows configuring of SoC pins and using them as59 configuring of SoC pins and using them as GPIOs.66 This pinctrl driver provides an interface that allows configuring74 This pinctrl driver provides an interface that allows configuring82 This pinctrl driver provides an interface that allows configuring90 This pinctrl driver provides an interface that allows configuring98 This pinctrl driver provides an interface that allows configuring106 This pinctrl driver provides an interface that allows configuring115 provides an interface that allows configuring of PCH pins and
36 More specific information on configuring the driver is in52 More specific information on configuring the driver is in72 More specific information on configuring the driver is in100 More specific information on configuring the driver is in136 More specific information on configuring the driver is in153 More specific information on configuring the driver is in172 More specific information on configuring the driver is in224 More specific information on configuring the driver is in251 More specific information on configuring the driver is in286 More specific information on configuring the driver is in[all …]
184 atomic_t configuring; member396 if (atomic_dec_and_test(&ctx->configuring)) in one_packet()402 if (atomic_dec_and_test(&ctx->configuring)) in one_packet()563 atomic_set(&ctx->configuring, 0); in init_tfm()648 atomic_inc(&ctx->configuring); in register_chain_var()723 atomic_inc(&ctx->configuring); in gen_rev_aes_key()820 atomic_inc(&ctx->configuring); in ablk_setkey()843 if (!atomic_dec_and_test(&ctx->configuring)) in ablk_setkey()888 if (atomic_read(&ctx->configuring)) in ablk_perform()996 if (atomic_read(&ctx->configuring)) in aead_perform()[all …]
29 More specific information on configuring the driver is in44 More specific information on configuring the driver is in
10 This driver supports configuring the GPIO and other pin configuration
13 Comments on configuring v4l2 subdevs for CIO2 and ImgU.
77 TCON TOP is responsible for configuring display pipeline for
51 This driver supports configuring XCV block of RGX interface
29 This allows configuring various IIO bits through configfs
99 This driver supports configuring of the TI CPSW Port mode depending on
73 configuring ISIF in VPFE to capture Raw Bayer RGB data from
46 This driver supports configuring of the phy mode connected to
13 configuring a kernel for an embedded system with
69 functions of the driver includes re-configuring AC timing
9 Say Y here if you want support for configuring FPGAs from the
96 configuring PPTP clients and servers to utilize this method.
459 dev->ex_dev.configuring = rg->configuring; in ex_assign_report_general()502 if (dev->ex_dev.configuring) { in sas_ex_general()
288 and configuring push-pull, open-drain, and can also be used as
37 of your keyboard and monitor. Therefore, only people configuring an
60 The IDE driver (which you are currently configuring) supports
44 configuring the supplies requested. This is mainly useful
1461 This is the driver needed for configuring the GPIOs via the Moxtet
1003 If you are configuring a Linux kernel for the Advantech single-board