| /drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 829 &context->bw_ctx.bw.dce)) in dce112_validate_bandwidth()
837 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce112_validate_bandwidth()
838 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce112_validate_bandwidth()
852 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce112_validate_bandwidth()
853 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce112_validate_bandwidth()
854 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce112_validate_bandwidth()
855 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce112_validate_bandwidth()
856 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce112_validate_bandwidth()
857 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce112_validate_bandwidth()
858 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce112_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_resource.c | 907 &context->bw_ctx.bw.dce)) in dce110_validate_bandwidth()
917 if (memcmp(&dc->current_state->bw_ctx.bw.dce, in dce110_validate_bandwidth()
918 &context->bw_ctx.bw.dce, sizeof(context->bw_ctx.bw.dce))) { in dce110_validate_bandwidth()
932 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].b_mark, in dce110_validate_bandwidth()
933 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[0].a_mark, in dce110_validate_bandwidth()
934 context->bw_ctx.bw.dce.urgent_wm_ns[0].b_mark, in dce110_validate_bandwidth()
935 context->bw_ctx.bw.dce.urgent_wm_ns[0].a_mark, in dce110_validate_bandwidth()
936 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].b_mark, in dce110_validate_bandwidth()
937 context->bw_ctx.bw.dce.stutter_exit_wm_ns[0].a_mark, in dce110_validate_bandwidth()
938 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[1].b_mark, in dce110_validate_bandwidth()
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| D | dce110_hw_sequencer.c | 1664 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1665 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1666 context->bw_ctx.bw.dce.stutter_entry_wm_ns[num_pipes], in dce110_set_displaymarks()
1667 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
1673 context->bw_ctx.bw.dce.nbp_state_change_wm_ns[num_pipes], in dce110_set_displaymarks()
1674 context->bw_ctx.bw.dce.stutter_exit_wm_ns[num_pipes], in dce110_set_displaymarks()
1675 context->bw_ctx.bw.dce.urgent_wm_ns[num_pipes], in dce110_set_displaymarks()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 183 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
185 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
187 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
189 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
191 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
204 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
210 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
223 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
254 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks()
269 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clk_mgr.c | 227 if (context->bw_ctx.bw.dce.dispclk_khz > in dce_get_required_clocks_state()
237 < context->bw_ctx.bw.dce.dispclk_khz) in dce_get_required_clocks_state()
615 context->bw_ctx.bw.dce.all_displays_in_sync; in dce11_pplib_apply_display_requirements()
617 context->bw_ctx.bw.dce.nbp_state_change_enable == false; in dce11_pplib_apply_display_requirements()
619 context->bw_ctx.bw.dce.cpuc_state_change_enable == false; in dce11_pplib_apply_display_requirements()
621 context->bw_ctx.bw.dce.cpup_state_change_enable == false; in dce11_pplib_apply_display_requirements()
623 context->bw_ctx.bw.dce.blackout_recovery_time_us; in dce11_pplib_apply_display_requirements()
625 pp_display_cfg->min_memory_clock_khz = context->bw_ctx.bw.dce.yclk_khz in dce11_pplib_apply_display_requirements()
630 context->bw_ctx.bw.dce.sclk_khz); in dce11_pplib_apply_display_requirements()
643 = context->bw_ctx.bw.dce.sclk_deep_sleep_khz; in dce11_pplib_apply_display_requirements()
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| D | Makefile | 34 AMD_DAL_DCE = $(addprefix $(AMDDALPATH)/dc/dce/,$(DCE))
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| /drivers/net/wan/ |
| D | hdlc_fr.c | 371 if (state(hdlc)->settings.dce) { in pvc_close()
473 int dce = state(hdlc)->settings.dce; in fr_lmi_send() local
479 if (dce && fullrep) { in fr_lmi_send()
503 data[i++] = dce ? LMI_STATUS : LMI_STATUS_ENQUIRY; in fr_lmi_send()
516 if (dce && fullrep) { in fr_lmi_send()
590 if (!state(hdlc)->settings.dce) in fr_set_link_state()
606 if (state(hdlc)->settings.dce) { in fr_timer()
631 if (state(hdlc)->settings.dce) in fr_timer()
656 int dce = state(hdlc)->settings.dce; in fr_lmi_recv() local
677 if (skb->data[5] != (dce ? LMI_STATUS_ENQUIRY : LMI_STATUS)) { in fr_lmi_recv()
[all …]
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| /drivers/gpu/drm/amd/display/dc/bios/ |
| D | command_table_helper2.c | 37 enum dce_version dce) in dal_bios_parser_init_cmd_tbl_helper2() argument
39 switch (dce) { in dal_bios_parser_init_cmd_tbl_helper2()
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| D | command_table_helper.c | 36 enum dce_version dce) in dal_bios_parser_init_cmd_tbl_helper() argument
38 switch (dce) { in dal_bios_parser_init_cmd_tbl_helper()
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| D | command_table_helper2.h | 35 enum dce_version dce);
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| D | command_table_helper.h | 35 enum dce_version dce);
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| D | dce_clk_mgr.c | 208 if (context->bw_ctx.bw.dce.dispclk_khz > in dce_get_required_clocks_state()
218 < context->bw_ctx.bw.dce.dispclk_khz) in dce_get_required_clocks_state()
401 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/ |
| D | Makefile | 26 DC_LIBS = basics bios calcs clk_mgr dce gpio irq virtual
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| /drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_resource.c | 780 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce100_validate_bandwidth()
781 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce100_validate_bandwidth()
783 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce100_validate_bandwidth()
784 context->bw_ctx.bw.dce.yclk_khz = 0; in dce100_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| D | dce120_clk_mgr.c | 91 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce12_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_resource.c | 814 context->bw_ctx.bw.dce.dispclk_khz = 681000; in dce80_validate_bandwidth()
815 context->bw_ctx.bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER_CZ; in dce80_validate_bandwidth()
817 context->bw_ctx.bw.dce.dispclk_khz = 0; in dce80_validate_bandwidth()
818 context->bw_ctx.bw.dce.yclk_khz = 0; in dce80_validate_bandwidth()
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| /drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| D | dce112_clk_mgr.c | 199 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce112_update_clocks()
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| /drivers/gpu/drm/amd/display/dc/inc/ |
| D | core_types.h | 363 struct dce_bw_output dce; member
|