Home
last modified time | relevance | path

Searched refs:dcs_write_seq (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/panel/
Dpanel-raydium-rm68200.c129 #define dcs_write_seq(ctx, seq...) \ macro
152 dcs_write_seq(ctx, MCS_CMD_MODE_SW, MCS_CMD2_P0); in rm68200_init_sequence()
154 dcs_write_seq(ctx, MCS_BT2CTR, 0xE5); in rm68200_init_sequence()
155 dcs_write_seq(ctx, MCS_SETAVDD, 0x0A); in rm68200_init_sequence()
156 dcs_write_seq(ctx, MCS_SETAVEE, 0x0A); in rm68200_init_sequence()
157 dcs_write_seq(ctx, MCS_SGOPCTR, 0x52); in rm68200_init_sequence()
158 dcs_write_seq(ctx, MCS_BT3CTR, 0x53); in rm68200_init_sequence()
159 dcs_write_seq(ctx, MCS_BT4CTR, 0x5A); in rm68200_init_sequence()
160 dcs_write_seq(ctx, MCS_INVCTR, 0x00); in rm68200_init_sequence()
161 dcs_write_seq(ctx, MCS_STBCTR, 0x0A); in rm68200_init_sequence()
[all …]
Dpanel-orisetech-otm8009a.c118 #define dcs_write_seq(ctx, seq...) \ macro
126 dcs_write_seq(ctx, MCS_ADRSFT, (cmd) & 0xFF); \
127 dcs_write_seq(ctx, (cmd) >> 8, seq); \
225 dcs_write_seq(ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00); in otm8009a_init_sequence()
243 dcs_write_seq(ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); in otm8009a_init_sequence()
254 dcs_write_seq(ctx, MIPI_DCS_WRITE_MEMORY_START); in otm8009a_init_sequence()