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Searched refs:dpll_hw_state (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/i915/display/
Dintel_dpll_mgr.c466 &crtc_state->dpll_hw_state, in ibx_get_dpll()
476 pll, &crtc_state->dpll_hw_state); in ibx_get_dpll()
828 crtc_state->dpll_hw_state.wrpll = val; in hsw_ddi_hdmi_get_dpll()
831 &crtc_state->dpll_hw_state, in hsw_ddi_hdmi_get_dpll()
879 memset(&crtc_state->dpll_hw_state, 0, in hsw_get_dpll()
880 sizeof(crtc_state->dpll_hw_state)); in hsw_get_dpll()
890 crtc_state->dpll_hw_state.spll = in hsw_get_dpll()
894 &crtc_state->dpll_hw_state, in hsw_get_dpll()
904 pll, &crtc_state->dpll_hw_state); in hsw_get_dpll()
1388 memset(&crtc_state->dpll_hw_state, 0, in skl_ddi_hdmi_pll_dividers()
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Dintel_display.c1381 I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll); in _vlv_enable_pll()
1400 if (pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) in vlv_enable_pll()
1403 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in vlv_enable_pll()
1431 I915_WRITE(DPLL(pipe), pipe_config->dpll_hw_state.dpll); in _chv_enable_pll()
1449 if (pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) in chv_enable_pll()
1460 I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()
1462 dev_priv->chv_dpll_md[pipe] = pipe_config->dpll_hw_state.dpll_md; in chv_enable_pll()
1470 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()
1488 u32 dpll = crtc_state->dpll_hw_state.dpll; in i9xx_enable_pll()
1511 crtc_state->dpll_hw_state.dpll_md); in i9xx_enable_pll()
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Dintel_display_types.h843 struct intel_dpll_hw_state dpll_hw_state; member
Dintel_ddi.c1489 struct intel_dpll_hw_state *pll_state = &pipe_config->dpll_hw_state; in icl_ddi_clock_get()
1515 struct intel_dpll_hw_state *pll_state = &pipe_config->dpll_hw_state; in cnl_ddi_clock_get()
1563 struct intel_dpll_hw_state *pll_state = &pipe_config->dpll_hw_state; in skl_ddi_clock_get()
1673 bxt_calc_pll_link(&pipe_config->dpll_hw_state); in bxt_ddi_clock_get()
Dicl_dsi.c1250 cnl_calc_wrpll_link(dev_priv, &pipe_config->dpll_hw_state); in gen11_dsi_get_config()