/drivers/media/platform/ti-vpe/ |
D | vpdma_priv.h | 301 static inline int dtd_get_data_type(struct vpdma_dtd *dtd) in dtd_get_data_type() argument 303 return dtd->type_ctl_stride >> DTD_DATA_TYPE_SHFT; in dtd_get_data_type() 306 static inline bool dtd_get_notify(struct vpdma_dtd *dtd) in dtd_get_notify() argument 308 return (dtd->type_ctl_stride >> DTD_NOTIFY_SHFT) & DTD_NOTIFY_MASK; in dtd_get_notify() 311 static inline int dtd_get_field(struct vpdma_dtd *dtd) in dtd_get_field() argument 313 return (dtd->type_ctl_stride >> DTD_FIELD_SHFT) & DTD_FIELD_MASK; in dtd_get_field() 316 static inline bool dtd_get_1d(struct vpdma_dtd *dtd) in dtd_get_1d() argument 318 return (dtd->type_ctl_stride >> DTD_1D_SHFT) & DTD_1D_MASK; in dtd_get_1d() 321 static inline bool dtd_get_even_line_skip(struct vpdma_dtd *dtd) in dtd_get_even_line_skip() argument 323 return (dtd->type_ctl_stride >> DTD_EVEN_LINE_SKIP_SHFT) in dtd_get_even_line_skip() [all …]
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D | vpdma.c | 548 static void dump_dtd(struct vpdma_dtd *dtd); 554 struct vpdma_dtd *dtd = list->buf.addr; in vpdma_update_dma_addr() local 558 dtd += idx; in vpdma_update_dma_addr() 561 dtd->start_addr = dma_addr; in vpdma_update_dma_addr() 570 dtd->desc_write_addr = dtd_desc_write_addr(write_desc_addr, in vpdma_update_dma_addr() 573 dtd->desc_write_addr = dtd_desc_write_addr(write_desc_addr, in vpdma_update_dma_addr() 578 dump_dtd(dtd); in vpdma_update_dma_addr() 743 static void dump_dtd(struct vpdma_dtd *dtd) in dump_dtd() argument 747 dir = dtd_get_dir(dtd); in dump_dtd() 748 chan = dtd_get_chan(dtd); in dump_dtd() [all …]
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/drivers/gpu/drm/gma500/ |
D | psb_intel_sdvo.c | 668 struct psb_intel_sdvo_dtd *dtd) in psb_intel_sdvo_set_timing() argument 670 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && in psb_intel_sdvo_set_timing() 671 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); in psb_intel_sdvo_set_timing() 675 struct psb_intel_sdvo_dtd *dtd) in psb_intel_sdvo_set_input_timing() argument 678 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); in psb_intel_sdvo_set_input_timing() 682 struct psb_intel_sdvo_dtd *dtd) in psb_intel_sdvo_set_output_timing() argument 685 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); in psb_intel_sdvo_set_output_timing() 713 struct psb_intel_sdvo_dtd *dtd) in psb_intel_sdvo_get_preferred_input_timing() argument 715 BUILD_BUG_ON(sizeof(dtd->part1) != 8); in psb_intel_sdvo_get_preferred_input_timing() 716 BUILD_BUG_ON(sizeof(dtd->part2) != 8); in psb_intel_sdvo_get_preferred_input_timing() [all …]
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/drivers/gpu/drm/i915/display/ |
D | intel_sdvo.c | 747 struct intel_sdvo_dtd *dtd) in intel_sdvo_set_timing() argument 749 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && in intel_sdvo_set_timing() 750 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); in intel_sdvo_set_timing() 754 struct intel_sdvo_dtd *dtd) in intel_sdvo_get_timing() argument 756 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) && in intel_sdvo_get_timing() 757 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2)); in intel_sdvo_get_timing() 761 struct intel_sdvo_dtd *dtd) in intel_sdvo_set_input_timing() argument 764 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); in intel_sdvo_set_input_timing() 768 struct intel_sdvo_dtd *dtd) in intel_sdvo_set_output_timing() argument 771 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); in intel_sdvo_set_output_timing() [all …]
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/drivers/usb/gadget/udc/ |
D | fsl_udc_core.c | 778 struct ep_td_struct *dtd; in fsl_build_dtd() local 784 dtd = dma_pool_alloc(udc_controller->td_pool, gfp_flags, dma); in fsl_build_dtd() 785 if (dtd == NULL) in fsl_build_dtd() 786 return dtd; in fsl_build_dtd() 788 dtd->td_dma = *dma; in fsl_build_dtd() 790 swap_temp = hc32_to_cpu(dtd->size_ioc_sts); in fsl_build_dtd() 792 dtd->size_ioc_sts = cpu_to_hc32(swap_temp); in fsl_build_dtd() 796 dtd->buff_ptr0 = cpu_to_hc32(swap_temp); in fsl_build_dtd() 797 dtd->buff_ptr1 = cpu_to_hc32(swap_temp + 0x1000); in fsl_build_dtd() 798 dtd->buff_ptr2 = cpu_to_hc32(swap_temp + 0x2000); in fsl_build_dtd() [all …]
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D | mv_udc_core.c | 338 struct mv_dtd *dtd; in build_dtd() local 360 dtd = dma_pool_alloc(udc->dtd_pool, GFP_ATOMIC, dma); in build_dtd() 361 if (dtd == NULL) in build_dtd() 362 return dtd; in build_dtd() 364 dtd->td_dma = *dma; in build_dtd() 367 dtd->buff_ptr0 = cpu_to_le32(temp); in build_dtd() 369 dtd->buff_ptr1 = cpu_to_le32(temp + 0x1000); in build_dtd() 370 dtd->buff_ptr2 = cpu_to_le32(temp + 0x2000); in build_dtd() 371 dtd->buff_ptr3 = cpu_to_le32(temp + 0x3000); in build_dtd() 372 dtd->buff_ptr4 = cpu_to_le32(temp + 0x4000); in build_dtd() [all …]
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D | mv_udc.h | 241 struct mv_dtd *dtd, *head, *tail; member
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/drivers/pinctrl/tegra/ |
D | pinctrl-tegra20.c | 2066 MUX_PG(dtd, RSVD1, SDIO2, VI, RSVD4, 0x14, 14, 0x84, 28, 0xa0, 24),
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