| /drivers/spi/ |
| D | spi-dw.c | 39 struct dw_spi *dws = file->private_data; in dw_spi_show_regs() local
49 "%s registers:\n", dev_name(&dws->master->dev)); in dw_spi_show_regs()
53 "CTRL0: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL0)); in dw_spi_show_regs()
55 "CTRL1: \t\t0x%08x\n", dw_readl(dws, DW_SPI_CTRL1)); in dw_spi_show_regs()
57 "SSIENR: \t0x%08x\n", dw_readl(dws, DW_SPI_SSIENR)); in dw_spi_show_regs()
59 "SER: \t\t0x%08x\n", dw_readl(dws, DW_SPI_SER)); in dw_spi_show_regs()
61 "BAUDR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_BAUDR)); in dw_spi_show_regs()
63 "TXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_TXFLTR)); in dw_spi_show_regs()
65 "RXFTLR: \t0x%08x\n", dw_readl(dws, DW_SPI_RXFLTR)); in dw_spi_show_regs()
67 "TXFLR: \t\t0x%08x\n", dw_readl(dws, DW_SPI_TXFLR)); in dw_spi_show_regs()
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| D | spi-dw-mid.c | 38 static int mid_spi_dma_init(struct dw_spi *dws) in mid_spi_dma_init() argument
41 struct dw_dma_slave *tx = dws->dma_tx; in mid_spi_dma_init()
42 struct dw_dma_slave *rx = dws->dma_rx; in mid_spi_dma_init()
58 dws->rxchan = dma_request_channel(mask, mid_spi_dma_chan_filter, rx); in mid_spi_dma_init()
59 if (!dws->rxchan) in mid_spi_dma_init()
61 dws->master->dma_rx = dws->rxchan; in mid_spi_dma_init()
65 dws->txchan = dma_request_channel(mask, mid_spi_dma_chan_filter, tx); in mid_spi_dma_init()
66 if (!dws->txchan) in mid_spi_dma_init()
68 dws->master->dma_tx = dws->txchan; in mid_spi_dma_init()
70 dws->dma_inited = 1; in mid_spi_dma_init()
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| D | spi-dw.h | 94 int (*dma_init)(struct dw_spi *dws);
95 void (*dma_exit)(struct dw_spi *dws);
96 int (*dma_setup)(struct dw_spi *dws, struct spi_transfer *xfer);
99 int (*dma_transfer)(struct dw_spi *dws, struct spi_transfer *xfer);
100 void (*dma_stop)(struct dw_spi *dws);
129 irqreturn_t (*transfer_handler)(struct dw_spi *dws);
149 static inline u32 dw_readl(struct dw_spi *dws, u32 offset) in dw_readl() argument
151 return __raw_readl(dws->regs + offset); in dw_readl()
154 static inline u16 dw_readw(struct dw_spi *dws, u32 offset) in dw_readw() argument
156 return __raw_readw(dws->regs + offset); in dw_readw()
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| D | spi-dw-pci.c | 45 struct dw_spi *dws; in spi_pci_probe() local
54 dws = devm_kzalloc(&pdev->dev, sizeof(*dws), GFP_KERNEL); in spi_pci_probe()
55 if (!dws) in spi_pci_probe()
59 dws->paddr = pci_resource_start(pdev, pci_bar); in spi_pci_probe()
65 dws->regs = pcim_iomap_table(pdev)[pci_bar]; in spi_pci_probe()
66 dws->irq = pdev->irq; in spi_pci_probe()
73 dws->num_cs = desc->num_cs; in spi_pci_probe()
74 dws->bus_num = desc->bus_num; in spi_pci_probe()
75 dws->max_freq = desc->max_freq; in spi_pci_probe()
78 ret = desc->setup(dws); in spi_pci_probe()
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| D | spi-dw-mmio.c | 28 struct dw_spi dws; member
60 struct dw_spi *dws = spi_master_get_devdata(spi->master); in dw_spi_mscc_set_cs() local
61 struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws); in dw_spi_mscc_set_cs()
105 dwsmmio->dws.set_cs = dw_spi_mscc_set_cs; in dw_spi_mscc_init()
128 dwsmmio->dws.cs_override = 1; in dw_spi_alpine_init()
138 struct dw_spi *dws; in dw_spi_mmio_probe() local
147 dws = &dwsmmio->dws; in dw_spi_mmio_probe()
150 dws->regs = devm_platform_ioremap_resource(pdev, 0); in dw_spi_mmio_probe()
151 if (IS_ERR(dws->regs)) { in dw_spi_mmio_probe()
153 return PTR_ERR(dws->regs); in dw_spi_mmio_probe()
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| D | spi-pxa2xx-pci.c | 65 struct dw_dma_slave *dws = param; in lpss_dma_filter() local
67 if (dws->dma_dev != chan->device->dev) in lpss_dma_filter()
70 chan->private = dws; in lpss_dma_filter()
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| /drivers/dma/dw/ |
| D | dw.c | 19 bool hs_polarity = dwc->dws.hs_polarity; in dw_dma_initialize_chan()
21 cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id); in dw_dma_initialize_chan()
22 cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id); in dw_dma_initialize_chan()
73 u8 p_master = dwc->dws.p_master; in dw_dma_prepare_ctllo()
74 u8 m_master = dwc->dws.m_master; in dw_dma_prepare_ctllo()
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| D | idma32.c | 21 cfghi |= IDMA32C_CFGH_DST_PER(dwc->dws.dst_id & 0xf); in idma32_initialize_chan()
22 cfghi |= IDMA32C_CFGH_SRC_PER(dwc->dws.src_id & 0xf); in idma32_initialize_chan()
25 cfghi |= IDMA32C_CFGH_DST_PER_EXT(dwc->dws.dst_id >> 4 & 0x3); in idma32_initialize_chan()
26 cfghi |= IDMA32C_CFGH_SRC_PER_EXT(dwc->dws.src_id >> 4 & 0x3); in idma32_initialize_chan()
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| D | core.c | 182 u8 lms = DWC_LLP_LMS(dwc->dws.m_master); in dwc_dostart()
555 u8 m_master = dwc->dws.m_master; in dwc_prep_dma_memcpy()
632 u8 m_master = dwc->dws.m_master; in dwc_prep_slave_sg()
775 struct dw_dma_slave *dws = param; in dw_dma_filter() local
777 if (dws->dma_dev != chan->device->dev) in dw_dma_filter()
781 memcpy(&dwc->dws, dws, sizeof(struct dw_dma_slave)); in dw_dma_filter()
1033 memset(&dwc->dws, 0, sizeof(struct dw_dma_slave)); in dwc_free_chan_resources()
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| D | regs.h | 288 struct dw_dma_slave dws; member
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_rlc.c | 87 int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws) in amdgpu_gfx_rlc_init_sr() argument
95 r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, in amdgpu_gfx_rlc_init_sr()
128 u32 dws; in amdgpu_gfx_rlc_init_csb() local
132 adev->gfx.rlc.clear_state_size = dws = adev->gfx.rlc.funcs->get_csb_size(adev); in amdgpu_gfx_rlc_init_csb()
133 r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, in amdgpu_gfx_rlc_init_csb()
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| D | amdgpu_rlc.h | 190 int amdgpu_gfx_rlc_init_sr(struct amdgpu_device *adev, u32 dws);
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| D | gfx_v6_0.c | 2379 u32 dws; in gfx_v6_0_rlc_init() local
2390 dws = adev->gfx.rlc.reg_list_size; in gfx_v6_0_rlc_init()
2395 r = amdgpu_gfx_rlc_init_sr(adev, dws); in gfx_v6_0_rlc_init()
2403 dws = adev->gfx.rlc.clear_state_size + (256 / 4); in gfx_v6_0_rlc_init()
2405 r = amdgpu_bo_create_reserved(adev, dws * 4, PAGE_SIZE, in gfx_v6_0_rlc_init()
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| D | gfx_v7_0.c | 3303 u32 dws; in gfx_v7_0_rlc_init() local
3324 dws = adev->gfx.rlc.reg_list_size; in gfx_v7_0_rlc_init()
3325 dws += (5 * 16) + 48 + 48 + 64; in gfx_v7_0_rlc_init()
3331 r = amdgpu_gfx_rlc_init_sr(adev, dws); in gfx_v7_0_rlc_init()
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| /drivers/tty/serial/8250/ |
| D | 8250_lpss.c | 246 struct dw_dma_slave *dws = param; in lpss8250_dma_filter() local
248 if (dws->dma_dev != chan->device->dev) in lpss8250_dma_filter()
251 chan->private = dws; in lpss8250_dma_filter()
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| /drivers/ata/ |
| D | sata_dwc_460ex.c | 205 struct dw_dma_slave *dws = &sata_dwc_dma_dws; in sata_dwc_dma_filter() local
207 if (dws->dma_dev != chan->device->dev) in sata_dwc_dma_filter()
210 chan->private = dws; in sata_dwc_dma_filter()
217 struct dw_dma_slave *dws = &sata_dwc_dma_dws; in sata_dwc_dma_get_channel_old() local
220 dws->dma_dev = hsdev->dev; in sata_dwc_dma_get_channel_old()
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| /drivers/gpu/drm/radeon/ |
| D | evergreen.c | 4157 u32 dws, data, i, j, k, reg_num; in sumo_rlc_init() local
4164 dws = rdev->rlc.reg_list_size; in sumo_rlc_init()
4166 dws += (5 * 16) + 48 + 48 + 64; in sumo_rlc_init()
4173 r = radeon_bo_create(rdev, dws * 4, PAGE_SIZE, true, in sumo_rlc_init()
4215 for (i = 0; i < dws; i++) { in sumo_rlc_init()
4218 if (i < dws) in sumo_rlc_init()
4233 rdev->rlc.clear_state_size = dws = cik_get_csb_size(rdev); in sumo_rlc_init()
4236 dws = rdev->rlc.clear_state_size + (256 / 4); in sumo_rlc_init()
4239 dws = 0; in sumo_rlc_init()
4243 dws += cs_data[i].section[j].reg_count; in sumo_rlc_init()
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