| /drivers/gpu/drm/tegra/ |
| D | falcon.c | 20 static void falcon_writel(struct falcon *falcon, u32 value, u32 offset) in falcon_writel() argument
22 writel(value, falcon->regs + offset); in falcon_writel()
25 int falcon_wait_idle(struct falcon *falcon) in falcon_wait_idle() argument
29 return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value, in falcon_wait_idle()
33 static int falcon_dma_wait_idle(struct falcon *falcon) in falcon_dma_wait_idle() argument
37 return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value, in falcon_dma_wait_idle()
41 static int falcon_copy_chunk(struct falcon *falcon, in falcon_copy_chunk() argument
51 falcon_writel(falcon, offset, FALCON_DMATRFMOFFS); in falcon_copy_chunk()
52 falcon_writel(falcon, base, FALCON_DMATRFFBOFFS); in falcon_copy_chunk()
53 falcon_writel(falcon, cmd, FALCON_DMATRFCMD); in falcon_copy_chunk()
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| D | falcon.h | 77 struct falcon;
80 void *(*alloc)(struct falcon *falcon, size_t size,
82 void (*free)(struct falcon *falcon, size_t size,
106 struct falcon { struct
116 int falcon_init(struct falcon *falcon); argument
117 void falcon_exit(struct falcon *falcon);
118 int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
119 int falcon_load_firmware(struct falcon *falcon);
120 int falcon_boot(struct falcon *falcon);
121 void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
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| D | vic.c | 31 struct falcon falcon; member
131 err = falcon_boot(&vic->falcon); in vic_boot()
135 hdr = vic->falcon.firmware.vaddr; in vic_boot()
137 hdr = vic->falcon.firmware.vaddr + in vic_boot()
141 falcon_execute_method(&vic->falcon, VIC_SET_APPLICATION_ID, 1); in vic_boot()
142 falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_SIZE, in vic_boot()
144 falcon_execute_method(&vic->falcon, VIC_SET_FCE_UCODE_OFFSET, in vic_boot()
145 (vic->falcon.firmware.paddr + fce_bin_data_offset) in vic_boot()
148 err = falcon_wait_idle(&vic->falcon); in vic_boot()
160 static void *vic_falcon_alloc(struct falcon *falcon, size_t size, in vic_falcon_alloc() argument
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/falcon/ |
| D | base.c | 27 nvkm_falcon_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_load_imem() argument
30 if (secure && !falcon->secret) { in nvkm_falcon_load_imem()
31 nvkm_warn(falcon->user, in nvkm_falcon_load_imem()
36 falcon->func->load_imem(falcon, data, start, size, tag, port, in nvkm_falcon_load_imem()
41 nvkm_falcon_load_dmem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_load_dmem() argument
44 mutex_lock(&falcon->dmem_mutex); in nvkm_falcon_load_dmem()
46 falcon->func->load_dmem(falcon, data, start, size, port); in nvkm_falcon_load_dmem()
48 mutex_unlock(&falcon->dmem_mutex); in nvkm_falcon_load_dmem()
52 nvkm_falcon_read_dmem(struct nvkm_falcon *falcon, u32 start, u32 size, u8 port, in nvkm_falcon_read_dmem() argument
55 mutex_lock(&falcon->dmem_mutex); in nvkm_falcon_read_dmem()
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| D | v1.c | 29 nvkm_falcon_v1_load_imem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_v1_load_imem() argument
39 nvkm_falcon_wr32(falcon, 0x180 + (port * 16), reg); in nvkm_falcon_v1_load_imem()
43 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); in nvkm_falcon_v1_load_imem()
44 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), ((u32 *)data)[i]); in nvkm_falcon_v1_load_imem()
56 nvkm_falcon_wr32(falcon, 0x188 + (port * 16), tag++); in nvkm_falcon_v1_load_imem()
57 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), in nvkm_falcon_v1_load_imem()
64 nvkm_falcon_wr32(falcon, 0x184 + (port * 16), 0); in nvkm_falcon_v1_load_imem()
68 nvkm_falcon_v1_load_emem(struct nvkm_falcon *falcon, void *data, u32 start, in nvkm_falcon_v1_load_emem() argument
76 nvkm_falcon_wr32(falcon, 0xac0 + (port * 8), start | (0x1 << 24)); in nvkm_falcon_v1_load_emem()
78 nvkm_falcon_wr32(falcon, 0xac4 + (port * 8), ((u32 *)data)[i]); in nvkm_falcon_v1_load_emem()
[all …]
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| D | msgqueue.c | 38 struct nvkm_falcon *falcon = priv->falcon; in msg_queue_open() local
42 queue->position = nvkm_falcon_rd32(falcon, queue->tail_reg); in msg_queue_open()
51 struct nvkm_falcon *falcon = priv->falcon; in msg_queue_close() local
54 nvkm_falcon_wr32(falcon, queue->tail_reg, queue->position); in msg_queue_close()
62 struct nvkm_falcon *falcon = priv->falcon; in msg_queue_empty() local
65 head = nvkm_falcon_rd32(falcon, queue->head_reg); in msg_queue_empty()
66 tail = nvkm_falcon_rd32(falcon, queue->tail_reg); in msg_queue_empty()
75 struct nvkm_falcon *falcon = priv->falcon; in msg_queue_pop() local
76 const struct nvkm_subdev *subdev = priv->falcon->owner; in msg_queue_pop()
79 head = nvkm_falcon_rd32(falcon, queue->head_reg); in msg_queue_pop()
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| D | Kbuild | 2 nvkm-y += nvkm/falcon/base.o
3 nvkm-y += nvkm/falcon/v1.o
4 nvkm-y += nvkm/falcon/msgqueue.o
5 nvkm-y += nvkm/falcon/msgqueue_0137c63d.o
6 nvkm-y += nvkm/falcon/msgqueue_0148cdec.o
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| D | msgqueue_0137c63d.c | 60 const struct nvkm_subdev *subdev = priv->base.falcon->owner; in msgqueue_0137c63d_cmd_queue()
139 const struct nvkm_subdev *subdev = _queue->falcon->owner; in init_callback()
203 const struct nvkm_subdev *subdev = queue->falcon->owner; in acr_init_wpr_callback()
252 const struct nvkm_subdev *subdev = priv->falcon->owner; in acr_boot_falcon_callback()
269 acr_boot_falcon(struct nvkm_msgqueue *priv, enum nvkm_secboot_falcon falcon) in acr_boot_falcon() argument
289 cmd.falcon_id = falcon; in acr_boot_falcon()
308 const struct nvkm_subdev *subdev = priv->falcon->owner; in acr_boot_multiple_falcons_callback()
390 msgqueue_0137c63d_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, in msgqueue_0137c63d_new() argument
401 nvkm_msgqueue_ctor(&msgqueue_0137c63d_func, falcon, &ret->base); in msgqueue_0137c63d_new()
416 msgqueue_0137bca5_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, in msgqueue_0137bca5_new() argument
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| D | msgqueue_0148cdec.c | 108 const struct nvkm_subdev *subdev = _queue->falcon->owner; in init_callback()
174 const struct nvkm_subdev *subdev = priv->falcon->owner; in acr_boot_falcon_callback()
199 acr_boot_falcon(struct nvkm_msgqueue *priv, enum nvkm_secboot_falcon falcon) in acr_boot_falcon() argument
219 cmd.falcon_id = falcon; in acr_boot_falcon()
250 msgqueue_0148cdec_new(struct nvkm_falcon *falcon, const struct nvkm_secboot *sb, in msgqueue_0148cdec_new() argument
261 nvkm_msgqueue_ctor(&msgqueue_0148cdec_func, falcon, &ret->base); in msgqueue_0148cdec_new()
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| /drivers/gpu/drm/nouveau/nvkm/engine/ |
| D | falcon.c | 32 struct nvkm_falcon *falcon = nvkm_falcon(oclass->engine); in nvkm_falcon_oclass_get() local
35 while (falcon->func->sclass[c].oclass) { in nvkm_falcon_oclass_get()
37 oclass->base = falcon->func->sclass[index]; in nvkm_falcon_oclass_get()
61 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_intr() local
62 struct nvkm_subdev *subdev = &falcon->engine.subdev; in nvkm_falcon_intr()
64 const u32 base = falcon->addr; in nvkm_falcon_intr()
74 if (falcon->func->intr) { in nvkm_falcon_intr()
75 falcon->func->intr(falcon, chan); in nvkm_falcon_intr()
98 struct nvkm_falcon *falcon = nvkm_falcon(engine); in nvkm_falcon_fini() local
99 struct nvkm_device *device = falcon->engine.subdev.device; in nvkm_falcon_fini()
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/subdev/secboot/ |
| D | gp102.c | 52 struct nvkm_falcon *falcon; in gp102_run_secure_scrub() local
65 falcon = device->nvdec[0]->falcon; in gp102_run_secure_scrub()
67 nvkm_falcon_get(falcon, &sb->subdev); in gp102_run_secure_scrub()
69 scrub_image = hs_ucode_load_blob(subdev, falcon, "nvdec/scrubber"); in gp102_run_secure_scrub()
73 nvkm_falcon_reset(falcon); in gp102_run_secure_scrub()
74 nvkm_falcon_bind_context(falcon, NULL); in gp102_run_secure_scrub()
81 nvkm_falcon_load_imem(falcon, scrub_data, lhdr->non_sec_code_off, in gp102_run_secure_scrub()
84 nvkm_falcon_load_imem(falcon, scrub_data + lhdr->apps[0], in gp102_run_secure_scrub()
88 nvkm_falcon_load_dmem(falcon, scrub_data + lhdr->data_dma_base, 0, in gp102_run_secure_scrub()
93 nvkm_falcon_set_start_addr(falcon, 0x0); in gp102_run_secure_scrub()
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| D | gm200.c | 38 struct nvkm_falcon *falcon) in gm200_secboot_run_blob() argument
46 ret = nvkm_falcon_get(falcon, subdev); in gm200_secboot_run_blob()
53 nvkm_falcon_put(falcon, subdev); in gm200_secboot_run_blob()
62 ret = nvkm_falcon_reset(falcon); in gm200_secboot_run_blob()
65 nvkm_falcon_bind_context(falcon, gsb->inst); in gm200_secboot_run_blob()
68 ret = sb->acr->func->load(sb->acr, falcon, blob, vma->addr); in gm200_secboot_run_blob()
75 nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false); in gm200_secboot_run_blob()
78 nvkm_falcon_wr32(falcon, 0x040, 0xdeada5a5); in gm200_secboot_run_blob()
81 nvkm_falcon_set_start_addr(falcon, start_address); in gm200_secboot_run_blob()
82 nvkm_falcon_start(falcon); in gm200_secboot_run_blob()
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| D | ls_ucode_msgqueue.c | 80 struct nvkm_falcon *falcon, u32 addr_args) in acr_ls_msgqueue_post_run() argument
82 struct nvkm_device *device = falcon->owner->device; in acr_ls_msgqueue_post_run()
87 nvkm_falcon_load_dmem(falcon, buf, addr_args, sizeof(buf), 0); in acr_ls_msgqueue_post_run()
92 nvkm_falcon_wr32(falcon, 0x10, 0xff); in acr_ls_msgqueue_post_run()
93 nvkm_mc_intr_mask(device, falcon->owner->index, true); in acr_ls_msgqueue_post_run()
96 nvkm_falcon_start(falcon); in acr_ls_msgqueue_post_run()
113 ret = nvkm_msgqueue_new(img->ucode_desc.app_version, pmu->falcon, in acr_ls_ucode_load_pmu()
126 u32 addr_args = pmu->falcon->data.limit - NVKM_MSGQUEUE_CMDLINE_SIZE; in acr_ls_pmu_post_run()
129 ret = acr_ls_msgqueue_post_run(pmu->queue, pmu->falcon, addr_args); in acr_ls_pmu_post_run()
151 ret = nvkm_msgqueue_new(img->ucode_desc.app_version, sec->falcon, in acr_ls_ucode_load_sec2()
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| D | hs_ucode.c | 34 hs_ucode_patch_signature(const struct nvkm_falcon *falcon, void *acr_image, in hs_ucode_patch_signature() argument
58 if (falcon->debug) { in hs_ucode_patch_signature()
71 hs_ucode_load_blob(struct nvkm_subdev *subdev, const struct nvkm_falcon *falcon, in hs_ucode_load_blob() argument
94 hs_ucode_patch_signature(falcon, acr_image, new_format); in hs_ucode_load_blob()
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| D | base.c | 136 sb->halt_falcon = sb->boot_falcon = subdev->device->pmu->falcon; in nvkm_secboot_oneinit()
141 sb->boot_falcon = subdev->device->sec2->falcon; in nvkm_secboot_oneinit()
142 sb->halt_falcon = subdev->device->pmu->falcon; in nvkm_secboot_oneinit()
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| D | acr_r352.c | 781 acr_r352_load(struct nvkm_acr *_acr, struct nvkm_falcon *falcon, in acr_r352_load() argument
820 nvkm_falcon_load_dmem(falcon, hsbl_data, 0x0, hsbl_desc->data_size, 0); in acr_r352_load()
823 nvkm_falcon_load_imem(falcon, hsbl_code, falcon->code.limit - code_size, in acr_r352_load()
832 nvkm_falcon_load_dmem(falcon, bl_desc, hsbl_desc->dmem_load_off, in acr_r352_load()
962 int falcon; in acr_r352_reset_nopmu() local
981 for_each_set_bit(falcon, &falcon_mask, NVKM_SECBOOT_FALCON_END) { in acr_r352_reset_nopmu()
982 acr->falcon_state[falcon] = RESET; in acr_r352_reset_nopmu()
1000 int falcon; in acr_r352_reset() local
1031 for_each_set_bit(falcon, &falcon_mask, NVKM_SECBOOT_FALCON_END) in acr_r352_reset()
1033 nvkm_secboot_falcon_name[falcon]); in acr_r352_reset()
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/subdev/pmu/ |
| D | gk20a.c | 98 struct nvkm_falcon *falcon = pmu->base.falcon; in gk20a_pmu_dvfs_get_dev_status() local
100 status->busy = nvkm_falcon_rd32(falcon, 0x508 + (BUSY_SLOT * 0x10)); in gk20a_pmu_dvfs_get_dev_status()
101 status->total= nvkm_falcon_rd32(falcon, 0x508 + (CLK_SLOT * 0x10)); in gk20a_pmu_dvfs_get_dev_status()
107 struct nvkm_falcon *falcon = pmu->base.falcon; in gk20a_pmu_dvfs_reset_dev_status() local
109 nvkm_falcon_wr32(falcon, 0x508 + (BUSY_SLOT * 0x10), 0x80000000); in gk20a_pmu_dvfs_reset_dev_status()
110 nvkm_falcon_wr32(falcon, 0x508 + (CLK_SLOT * 0x10), 0x80000000); in gk20a_pmu_dvfs_reset_dev_status()
163 nvkm_falcon_put(pmu->falcon, &pmu->subdev); in gk20a_pmu_fini()
172 struct nvkm_falcon *falcon = pmu->falcon; in gk20a_pmu_init() local
175 ret = nvkm_falcon_get(falcon, subdev); in gk20a_pmu_init()
177 nvkm_error(subdev, "cannot acquire %s falcon!\n", falcon->name); in gk20a_pmu_init()
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| D | base.c | 140 return nvkm_falcon_v1_new(&pmu->subdev, "PMU", 0x10a000, &pmu->falcon); in nvkm_pmu_oneinit()
148 nvkm_falcon_del(&pmu->falcon); in nvkm_pmu_dtor()
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| /drivers/gpu/drm/nouveau/include/nvkm/engine/ |
| D | falcon.h | 87 int (*enable)(struct nvkm_falcon *falcon);
88 void (*disable)(struct nvkm_falcon *falcon);
94 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr) in nvkm_falcon_rd32() argument
96 return nvkm_rd32(falcon->owner->device, falcon->addr + addr); in nvkm_falcon_rd32()
100 nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data) in nvkm_falcon_wr32() argument
102 nvkm_wr32(falcon->owner->device, falcon->addr + addr, data); in nvkm_falcon_wr32()
106 nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val) in nvkm_falcon_mask() argument
108 struct nvkm_device *device = falcon->owner->device; in nvkm_falcon_mask()
110 return nvkm_mask(device, falcon->addr + addr, mask, val); in nvkm_falcon_mask()
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| /drivers/net/ethernet/sfc/falcon/ |
| D | Makefile | 2 sfc-falcon-y += efx.o nic.o farch.o falcon.o tx.o rx.o selftest.o \
6 sfc-falcon-$(CONFIG_SFC_FALCON_MTD) += mtd.o
7 obj-$(CONFIG_SFC_FALCON) += sfc-falcon.o
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| /drivers/video/fbdev/ |
| D | atafb.c | 130 } falcon; member
142 #define HHT hw.falcon.hht
143 #define HBB hw.falcon.hbb
144 #define HBE hw.falcon.hbe
145 #define HDB hw.falcon.hdb
146 #define HDE hw.falcon.hde
147 #define HSS hw.falcon.hss
148 #define VFT hw.falcon.vft
149 #define VBB hw.falcon.vbb
150 #define VBE hw.falcon.vbe
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| /drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| D | gf100.c | 1638 gf100_gr_init_fw(struct nvkm_falcon *falcon, in gf100_gr_init_fw() argument
1641 nvkm_falcon_load_dmem(falcon, data->data, 0x0, data->size, 0); in gf100_gr_init_fw()
1642 nvkm_falcon_load_imem(falcon, code->data, 0x0, code->size, 0, 0, false); in gf100_gr_init_fw()
1648 u32 falcon, u32 starstar, u32 base) in gf100_gr_init_csdata() argument
1656 nvkm_wr32(device, falcon + 0x01c0, 0x02000000 + starstar); in gf100_gr_init_csdata()
1657 star = nvkm_rd32(device, falcon + 0x01c4); in gf100_gr_init_csdata()
1658 temp = nvkm_rd32(device, falcon + 0x01c4); in gf100_gr_init_csdata()
1661 nvkm_wr32(device, falcon + 0x01c0, 0x01000000 + star); in gf100_gr_init_csdata()
1670 nvkm_wr32(device, falcon + 0x01c4, data); in gf100_gr_init_csdata()
1682 nvkm_wr32(device, falcon + 0x01c4, (--xfer << 26) | addr); in gf100_gr_init_csdata()
[all …]
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| /drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ |
| D | gv100.c | 35 return nvkm_falcon_v1_new(subdev, "GSP", gsp->addr, &gsp->falcon); in gv100_gsp_oneinit()
42 nvkm_falcon_del(&gsp->falcon); in gv100_gsp_dtor()
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| /drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ |
| D | base.c | 39 &nvdec->falcon); in nvkm_nvdec_oneinit()
46 nvkm_falcon_del(&nvdec->falcon); in nvkm_nvdec_dtor()
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| /drivers/gpu/drm/nouveau/nvkm/engine/sec2/ |
| D | base.c | 33 nvkm_falcon_del(&sec2->falcon); in nvkm_sec2_dtor()
86 return nvkm_falcon_v1_new(subdev, "SEC2", sec2->addr, &sec2->falcon); in nvkm_sec2_oneinit()
|