| /drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | power_budget.c | 118 entry->max_w = nvbios_rd32(bios, entry_offset + 0xa); in nvbios_power_budget_entry()
121 entry->max_w = nvbios_rd32(bios, entry_offset + 0x2); in nvbios_power_budget_entry()
122 entry->avg_w = entry->max_w; in nvbios_power_budget_entry()
|
| /drivers/media/platform/mtk-mdp/ |
| D | mtk_mdp_m2m.c | 180 u32 max_w, max_h, align_w, align_h; in mtk_mdp_try_fmt_mplane() local
204 max_w = variant->pix_max->target_rot_dis_w; in mtk_mdp_try_fmt_mplane()
226 align_w, align_h, max_w, max_h); in mtk_mdp_try_fmt_mplane()
234 mtk_mdp_bound_align_image(&pix_mp->width, min_w, max_w, align_w, in mtk_mdp_try_fmt_mplane()
285 u32 min_w, min_h, max_w, max_h; in mtk_mdp_try_crop() local
297 max_w = frame->width; in mtk_mdp_try_crop()
312 max_w = frame->height; in mtk_mdp_try_crop()
327 mtk_mdp_bound_align_image(&new_w, min_w, max_w, align_w, in mtk_mdp_try_crop()
341 if (r->left + new_w > max_w) in mtk_mdp_try_crop()
342 r->left = max_w - new_w; in mtk_mdp_try_crop()
[all …]
|
| /drivers/media/platform/exynos-gsc/ |
| D | gsc-core.c | 396 u32 max_w, max_h, mod_x, mod_y; in gsc_try_fmt_mplane() local
416 max_w = variant->pix_max->target_rot_dis_w; in gsc_try_fmt_mplane()
435 mod_x, mod_y, max_w, max_h); in gsc_try_fmt_mplane()
442 v4l_bound_align_image(&pix_mp->width, min_w, max_w, mod_x, in gsc_try_fmt_mplane()
524 u32 min_w, min_h, max_w, max_h; in gsc_try_selection() local
539 max_w = f->f_width; in gsc_try_selection()
562 max_w = f->f_height; in gsc_try_selection()
577 v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x, in gsc_try_selection()
592 if (s->r.left + tmp_w > max_w) in gsc_try_selection()
593 s->r.left = max_w - tmp_w; in gsc_try_selection()
[all …]
|
| /drivers/dma/ |
| D | ste_dma40_ll.c | 195 u32 max_w = max(data_width1, data_width2); in d40_seg_size() local
197 u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE * min_w, max_w); in d40_seg_size()
200 seg_max -= max_w; in d40_seg_size()
206 return ALIGN(size / 2, max_w); in d40_seg_size()
|
| D | ste_dma40.c | 1000 u32 max_w = max(data_width1, data_width2); in d40_size_2_dmalen() local
1002 u32 seg_max = ALIGN(STEDMA40_MAX_SEG_SIZE * min_w, max_w); in d40_size_2_dmalen()
1005 seg_max -= max_w; in d40_size_2_dmalen()
1007 if (!IS_ALIGNED(size, max_w)) in d40_size_2_dmalen()
|
| /drivers/media/platform/coda/ |
| D | coda-common.c | 122 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \ argument
123 { mode, src_fourcc, dst_fourcc, max_w, max_h }
303 int *max_w, int *max_h) in coda_get_max_dimensions() argument
311 w = codec->max_w; in coda_get_max_dimensions()
315 w = max(w, codecs[k].max_w); in coda_get_max_dimensions()
320 if (max_w) in coda_get_max_dimensions()
321 *max_w = w; in coda_get_max_dimensions()
524 unsigned int max_w, max_h; in coda_try_fmt() local
537 coda_get_max_dimensions(dev, codec, &max_w, &max_h); in coda_try_fmt()
538 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w, W_ALIGN, in coda_try_fmt()
[all …]
|
| D | coda.h | 102 u32 max_w; member
|
| /drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| D | power_budget.h | 10 u32 max_w; member
|
| /drivers/gpu/drm/i915/display/ |
| D | intel_fbc.c | 634 unsigned int effective_w, effective_h, max_w, max_h; in intel_fbc_hw_tracking_covers_screen() local
637 max_w = 5120; in intel_fbc_hw_tracking_covers_screen()
640 max_w = 4096; in intel_fbc_hw_tracking_covers_screen()
643 max_w = 4096; in intel_fbc_hw_tracking_covers_screen()
646 max_w = 2048; in intel_fbc_hw_tracking_covers_screen()
655 return effective_w <= max_w && effective_h <= max_h; in intel_fbc_hw_tracking_covers_screen()
|
| /drivers/media/platform/ti-vpe/ |
| D | vpdma.h | 245 int max_w, int max_h, enum vpdma_channel chan, u32 flags);
249 int max_w, int max_h, int raw_vpdma_chan, u32 flags);
|
| D | vpdma.c | 805 int max_w, int max_h, enum vpdma_channel chan, u32 flags) in vpdma_add_out_dtd() argument
808 max_w, max_h, chan_info[chan].num, flags); in vpdma_add_out_dtd()
815 int max_w, int max_h, int raw_vpdma_chan, u32 flags) in vpdma_rawchan_add_out_dtd() argument
851 dtd->max_width_height = dtd_max_width_height(max_w, max_h); in vpdma_rawchan_add_out_dtd()
|
| /drivers/media/platform/exynos4-is/ |
| D | fimc-m2m.c | 273 u32 max_w, mod_x, mod_y; in fimc_try_fmt_mplane() local
289 max_w = variant->pix_limit->scaler_dis_w; in fimc_try_fmt_mplane()
292 max_w = variant->pix_limit->out_rot_dis_w; in fimc_try_fmt_mplane()
306 v4l_bound_align_image(&pix->width, 16, max_w, mod_x, in fimc_try_fmt_mplane()
|
| D | fimc-capture.c | 581 u32 depth, min_w, max_w, min_h, align_h = 3; in fimc_capture_try_format() local
606 max_w = fimc_fmt_is_user_defined(ffmt->color) ? in fimc_capture_try_format()
609 v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4, in fimc_capture_try_format()
624 max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w; in fimc_capture_try_format()
636 v4l_bound_align_image(width, min_w, max_w, in fimc_capture_try_format()
658 u32 max_w, max_h, min_w = 0, min_h = 0, min_sz; in fimc_capture_try_selection() local
694 max_w = min_t(u32, in fimc_capture_try_selection()
700 min_w = min_t(u32, max_w, sink->f_width / max_sc_h); in fimc_capture_try_selection()
707 v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1, in fimc_capture_try_selection()
|
| /drivers/media/platform/vsp1/ |
| D | vsp1_entity.h | 192 unsigned int max_w, unsigned int max_h);
|
| /drivers/media/i2c/ |
| D | rj54n1cb0c.c | 983 int output_w, output_h, max_w, max_h, in rj54n1_set_fmt() local
1096 max_w = mf->width * (16 * 1024 - 1) / 1024; in rj54n1_set_fmt()
1097 if (input_w > max_w) in rj54n1_set_fmt()
1098 input_w = max_w; in rj54n1_set_fmt()
|
| /drivers/media/common/v4l2-tpg/ |
| D | v4l2-tpg-core.c | 112 int tpg_alloc(struct tpg_data *tpg, unsigned max_w) in tpg_alloc() argument
117 tpg->max_line_width = max_w; in tpg_alloc()
123 vzalloc(array3_size(max_w, 2, pixelsz)); in tpg_alloc()
129 vzalloc(array3_size(max_w, 2, pixelsz)); in tpg_alloc()
138 vzalloc(array_size(pixelsz, max_w)); in tpg_alloc()
142 vzalloc(array_size(pixelsz, max_w)); in tpg_alloc()
146 vzalloc(array3_size(max_w, 2, pixelsz)); in tpg_alloc()
|
| /drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/ |
| D | base.c | 234 iccsense->power_w_crit = entry.max_w; in nvkm_iccsense_oneinit()
|