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Searched refs:outb (Results 1 – 25 of 386) sorted by relevance

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/drivers/net/ethernet/realtek/
Datp.h97 outb(EOC+offset, port + PAR_DATA); in read_nibble()
98 outb(RdAddr+offset, port + PAR_DATA); in read_nibble()
101 outb(EOC+offset, port + PAR_DATA); in read_nibble()
112 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
115 outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
126 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode2()
129 outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL); in read_byte_mode2()
139 outb(RdAddr | MAR, ioaddr + PAR_DATA); in read_byte_mode4()
141 outb(RdAddr | HNib | MAR, ioaddr + PAR_DATA); in read_byte_mode4()
150 outb(RdAddr | MAR, ioaddr + PAR_DATA); in read_byte_mode6()
[all …]
/drivers/staging/comedi/drivers/
Dssv_dnp.c57 outb(PADR, CSCIR); in dnp_dio_insn_bits()
58 outb(s->state & 0xff, CSCDR); in dnp_dio_insn_bits()
60 outb(PBDR, CSCIR); in dnp_dio_insn_bits()
61 outb((s->state >> 8) & 0xff, CSCDR); in dnp_dio_insn_bits()
63 outb(PCDR, CSCIR); in dnp_dio_insn_bits()
65 outb(((s->state >> 12) & 0xf0) | val, CSCDR); in dnp_dio_insn_bits()
68 outb(PADR, CSCIR); in dnp_dio_insn_bits()
70 outb(PBDR, CSCIR); in dnp_dio_insn_bits()
72 outb(PCDR, CSCIR); in dnp_dio_insn_bits()
96 outb(PAMR, CSCIR); in dnp_dio_insn_config()
[all …]
Ddmm32at.c167 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
170 outb(DMM32AT_FIFO_CTRL_SCANEN, in dmm32at_ai_set_chanspec()
173 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec()
174 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec()
175 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec()
220 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read()
344 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer()
347 outb(DMM32AT_CTRL_PAGE_8254, dev->iobase + DMM32AT_CTRL_REG); in dmm32at_setaitimer()
350 outb(DMM32AT_CLKCT1, dev->iobase + DMM32AT_CLKCT); in dmm32at_setaitimer()
351 outb(lo1, dev->iobase + DMM32AT_CLK1); in dmm32at_setaitimer()
[all …]
Dadv_pci_dio.c251 outb(s->state & 0xff, iobase); in pci_dio_insn_bits_do_b()
253 outb((s->state >> 8) & 0xff, iobase + 1); in pci_dio_insn_bits_do_b()
255 outb((s->state >> 16) & 0xff, iobase + 2); in pci_dio_insn_bits_do_b()
257 outb((s->state >> 24) & 0xff, iobase + 3); in pci_dio_insn_bits_do_b()
295 outb(0, dev->iobase + PCI173X_INT_EN_REG); in pci_dio_reset()
296 outb(0x0f, dev->iobase + PCI173X_INT_CLR_REG); in pci_dio_reset()
297 outb(0, dev->iobase + PCI173X_INT_RF_REG); in pci_dio_reset()
302 outb(0x88, dev->iobase + PCI1750_INT_REG); in pci_dio_reset()
306 outb(0x88, dev->iobase + PCI1753_INT_REG(0)); in pci_dio_reset()
307 outb(0x80, dev->iobase + PCI1753_INT_REG(1)); in pci_dio_reset()
[all …]
/drivers/block/paride/
Dppc6lnx.c129 outb(i, ppc->lpt_addr + 1); in ppc6_select()
139 outb(ppc->cur_ctrl, ppc->lpt_addr + 2); in ppc6_select()
142 outb('x', ppc->lpt_addr); in ppc6_select()
144 outb('b', ppc->lpt_addr); in ppc6_select()
145 outb('p', ppc->lpt_addr); in ppc6_select()
146 outb(ppc->ppc_id, ppc->lpt_addr); in ppc6_select()
147 outb(~ppc->ppc_id,ppc->lpt_addr); in ppc6_select()
151 outb(ppc->cur_ctrl, ppc->lpt_addr + 2); in ppc6_select()
155 outb(ppc->cur_ctrl, ppc->lpt_addr + 2); in ppc6_select()
162 outb(i, ppc->lpt_addr); in ppc6_select()
[all …]
/drivers/scsi/
Dinitio.c281 outb(SE2CS | SE2DO, base + TUL_NVRAM); /* cs+start bit */ in initio_se2_instr()
283 outb(SE2CS | SE2CLK | SE2DO, base + TUL_NVRAM); /* +CLK */ in initio_se2_instr()
291 outb(b, base + TUL_NVRAM); in initio_se2_instr()
293 outb(b | SE2CLK, base + TUL_NVRAM); /* +CLK */ in initio_se2_instr()
297 outb(SE2CS, base + TUL_NVRAM); /* -CLK */ in initio_se2_instr()
311 outb(0, base + TUL_NVRAM); /* -CS */ in initio_se2_ew_en()
325 outb(0, base + TUL_NVRAM); /* -CS */ in initio_se2_ew_ds()
347 outb(SE2CS | SE2CLK, base + TUL_NVRAM); /* +CLK */ in initio_se2_rd()
349 outb(SE2CS, base + TUL_NVRAM); /* -CLK */ in initio_se2_rd()
358 outb(0, base + TUL_NVRAM); /* no chip select */ in initio_se2_rd()
[all …]
Dfdomain.c120 outb(0, fd->base + REG_BCTL); in fdomain_make_bus_idle()
121 outb(0, fd->base + REG_MCTL); in fdomain_make_bus_idle()
124 outb(ACTL_RESET | ACTL_CLRFIRQ | PARITY_MASK, in fdomain_make_bus_idle()
127 outb(ACTL_RESET | PARITY_MASK, fd->base + REG_ACTL); in fdomain_make_bus_idle()
144 outb(CFG2_32BIT, port + REG_CFG2); in fdomain_identify()
146 outb(0, port + REG_CFG2); in fdomain_identify()
159 outb(i, base + REG_LOOPBACK); in fdomain_test_loopback()
169 outb(BCTL_RST, base + REG_BCTL); in fdomain_reset()
171 outb(0, base + REG_BCTL); in fdomain_reset()
173 outb(0, base + REG_MCTL); in fdomain_reset()
[all …]
Dqlogicfas408.c86 outb(3, qbase + 3); /* reset SCSI */ in ql_zap()
87 outb(2, qbase + 3); /* reset chip */ in ql_zap()
166 outb(*request++, qbase + 4); in ql_pdma()
226 outb(2, qbase + 3); /* reset chip */ in ql_icmd()
228 outb(1, qbase + 3); /* clear fifo */ in ql_icmd()
231 outb(1, qbase + 8); /* set for PIO pseudo DMA */ in ql_icmd()
232 outb(0, qbase + 0xb); /* disable ints */ in ql_icmd()
235 outb(0x40, qbase + 0xb); /* enable features */ in ql_icmd()
238 outb(qlcfgc, qbase + 0xc); in ql_icmd()
240 outb(0x40 | qlcfg8 | priv->qinitid, qbase + 8); in ql_icmd()
[all …]
/drivers/media/radio/
Dradio-zoltrix.c94 outb(0, isa->io); in zoltrix_s_mute_volume()
95 outb(0, isa->io); in zoltrix_s_mute_volume()
100 outb(vol - 1, isa->io); in zoltrix_s_mute_volume()
126 outb(0, isa->io); in zoltrix_s_frequency()
127 outb(0, isa->io); in zoltrix_s_frequency()
130 outb(0x40, isa->io); in zoltrix_s_frequency()
131 outb(0xc0, isa->io); in zoltrix_s_frequency()
136 outb(0x80, isa->io); in zoltrix_s_frequency()
138 outb(0x00, isa->io); in zoltrix_s_frequency()
140 outb(0x80, isa->io); in zoltrix_s_frequency()
[all …]
/drivers/net/ethernet/8390/
Dne2k-pci.c264 outb(E8390_NODMA+E8390_PAGE1+E8390_STOP, ioaddr + E8390_CMD); in ne2k_pci_init_one()
266 outb(0xff, ioaddr + 0x0d); in ne2k_pci_init_one()
267 outb(E8390_NODMA+E8390_PAGE0, ioaddr + E8390_CMD); in ne2k_pci_init_one()
270 outb(reg0, ioaddr); in ne2k_pci_init_one()
271 outb(regd, ioaddr + 0x0d); /* Restore the old values. */ in ne2k_pci_init_one()
292 outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); in ne2k_pci_init_one()
305 outb(0xff, ioaddr + EN0_ISR); /* Ack all intr. */ in ne2k_pci_init_one()
329 outb(program_seq[i].value, ioaddr + program_seq[i].offset); in ne2k_pci_init_one()
343 outb(0x49, ioaddr + EN0_DCFG); in ne2k_pci_init_one()
406 outb(0xC0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 3 */ in set_realtek_fdx()
[all …]
Dapne.c224 outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET); in apne_probe1()
232 outb(0xff, ioaddr + NE_EN0_ISR); /* Ack all intr. */ in apne_probe1()
258 outb(program_seq[i].value, ioaddr + program_seq[i].offset); in apne_probe1()
280 outb(0x49, ioaddr + NE_EN0_DCFG); in apne_probe1()
307 outb(0x49, ioaddr + NE_EN0_DCFG); in apne_probe1()
369 outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET); in apne_reset_8390()
380 outb(ENISR_RESET, NE_BASE + NE_EN0_ISR); /* Ack intr. */ in apne_reset_8390()
405 outb(E8390_NODMA+E8390_PAGE0+E8390_START, nic_base+ NE_CMD); in apne_get_8390_hdr()
406 outb(ENISR_RDC, nic_base + NE_EN0_ISR); in apne_get_8390_hdr()
407 outb(sizeof(struct e8390_pkt_hdr), nic_base + NE_EN0_RCNTLO); in apne_get_8390_hdr()
[all …]
Dsmc-ultra.c227 outb(reg4, ioaddr + 4); in ultra_probe1()
249 outb(0x80 | reg4, ioaddr + 4); in ultra_probe1()
252 outb(0x80 | inb(ioaddr + 0x0c), ioaddr + 0x0c); in ultra_probe1()
259 outb(reg4, ioaddr + 4); in ultra_probe1()
397 outb(0x00, ioaddr); /* Disable shared memory for safety. */ in ultra_open()
398 outb(0x80, ioaddr + 5); in ultra_open()
400 outb(inb(ioaddr + 4) | 0x80, ioaddr + 4); in ultra_open()
401 outb((inb(ioaddr + 13) & ~0x4C) | irq2reg[dev->irq], ioaddr + 13); in ultra_open()
402 outb(inb(ioaddr + 4) & 0x7f, ioaddr + 4); in ultra_open()
405 outb(0x11, ioaddr + 6); /* Enable interrupts and PIO. */ in ultra_open()
[all …]
/drivers/scsi/pcmcia/
Dsym53c500_cs.c124 #define REG0(x) (outb(C4_IMG, (x) + CONFIG4))
126 #define REG1(x) outb(C7_IMG, (x) + CONFIG7); outb(C5_IMG, (x) + CONFIG5)
141 outb(count & 0xff, (x) + TC_LSB); \
142 outb((count >> 8) & 0xff, (x) + TC_MSB); \
143 outb((count >> 16) & 0xff, (x) + TC_HIGH);
211 outb(0x01, io_port + PIO_STATUS); in chip_init()
212 outb(0x00, io_port + PIO_FLAG); in chip_init()
214 outb(C4_IMG, io_port + CONFIG4); /* REG0(io_port); */ in chip_init()
215 outb(C3_IMG, io_port + CONFIG3); in chip_init()
216 outb(C2_IMG, io_port + CONFIG2); in chip_init()
[all …]
/drivers/input/gameport/
Dlightning.c66 outb(L4_SELECT_ANALOG, L4_PORT); in l4_cooked_read()
67 outb(L4_SELECT_DIGITAL + (l4->port >> 2), L4_PORT); in l4_cooked_read()
70 outb(l4->port & 3, L4_PORT); in l4_cooked_read()
89 fail: outb(L4_SELECT_ANALOG, L4_PORT); in l4_cooked_read()
99 outb(L4_SELECT_ANALOG, L4_PORT); in l4_open()
111 outb(L4_SELECT_ANALOG, L4_PORT); in l4_getcal()
112 outb(L4_SELECT_DIGITAL + (port >> 2), L4_PORT); in l4_getcal()
116 outb(L4_CMD_GETCAL, L4_PORT); in l4_getcal()
125 outb(port & 3, L4_PORT); in l4_getcal()
135 out: outb(L4_SELECT_ANALOG, L4_PORT); in l4_getcal()
[all …]
/drivers/irqchip/
Dirq-i8259.c77 outb(cached_slave_mask, PIC_SLAVE_IMR); in disable_8259A_irq()
79 outb(cached_master_mask, PIC_MASTER_IMR); in disable_8259A_irq()
92 outb(cached_slave_mask, PIC_SLAVE_IMR); in enable_8259A_irq()
94 outb(cached_master_mask, PIC_MASTER_IMR); in enable_8259A_irq()
117 outb(0x0B, PIC_MASTER_CMD); /* ISR register */ in i8259A_irq_real()
119 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */ in i8259A_irq_real()
122 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */ in i8259A_irq_real()
124 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */ in i8259A_irq_real()
163 outb(cached_slave_mask, PIC_SLAVE_IMR); in mask_and_ack_8259A()
164 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ in mask_and_ack_8259A()
[all …]
/drivers/i2c/busses/
Dscx200_acb.c123 outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1); in scx200_acb_machine()
124 outb(ACBST_STASTR | ACBST_NEGACK, ACBST); in scx200_acb_machine()
127 outb(0, ACBST); in scx200_acb_machine()
138 outb(iface->address_byte & ~1, ACBSDA); in scx200_acb_machine()
144 outb(iface->command, ACBSDA); in scx200_acb_machine()
153 outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1); in scx200_acb_machine()
159 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1); in scx200_acb_machine()
161 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1); in scx200_acb_machine()
162 outb(iface->address_byte, ACBSDA); in scx200_acb_machine()
166 outb(iface->address_byte, ACBSDA); in scx200_acb_machine()
[all …]
Di2c-isch.c81 outb(temp, SMBHSTSTS); in sch_transaction()
91 outb(inb(SMBHSTCNT) | 0x10, SMBHSTCNT); in sch_transaction()
113 outb(temp, SMBHSTSTS); in sch_transaction()
167 outb((addr << 1) | read_write, SMBHSTADD); in sch_access()
171 outb((addr << 1) | read_write, SMBHSTADD); in sch_access()
173 outb(command, SMBHSTCMD); in sch_access()
177 outb((addr << 1) | read_write, SMBHSTADD); in sch_access()
178 outb(command, SMBHSTCMD); in sch_access()
180 outb(data->byte, SMBHSTDAT0); in sch_access()
184 outb((addr << 1) | read_write, SMBHSTADD); in sch_access()
[all …]
/drivers/net/ethernet/fujitsu/
Dfmvj18x_cs.c444 outb(CONFIG0_RST, ioaddr + CONFIG_0); in fmvj18x_config()
446 outb(CONFIG0_RST_1, ioaddr + CONFIG_0); in fmvj18x_config()
450 outb(BANK_0, ioaddr + CONFIG_1); in fmvj18x_config()
452 outb(BANK_0U, ioaddr + CONFIG_1); in fmvj18x_config()
735 outb(tx_stat, ioaddr + TX_STATUS); in fjn_interrupt()
736 outb(rx_stat, ioaddr + RX_STATUS); in fjn_interrupt()
749 outb(DO_TX | lp->tx_queue, ioaddr + TX_START); in fjn_interrupt()
762 outb(D_TX_INTR, ioaddr + TX_INTR); in fjn_interrupt()
763 outb(D_RX_INTR, ioaddr + RX_INTR); in fjn_interrupt()
849 outb(DO_TX | lp->tx_queue, ioaddr + TX_START); in fjn_start_xmit()
[all …]
/drivers/watchdog/
Dit87_wdt.c110 outb(0x87, REG); in superio_enter()
111 outb(0x01, REG); in superio_enter()
112 outb(0x55, REG); in superio_enter()
113 outb(0x55, REG); in superio_enter()
119 outb(0x02, REG); in superio_exit()
120 outb(0x02, VAL); in superio_exit()
126 outb(LDNREG, REG); in superio_select()
127 outb(ldn, VAL); in superio_select()
132 outb(reg, REG); in superio_inb()
138 outb(reg, REG); in superio_outb()
[all …]
/drivers/input/mouse/
Dinport.c74 outb(INPORT_REG_MODE, INPORT_CONTROL_PORT); in inport_interrupt()
75 outb(INPORT_MODE_HOLD | INPORT_MODE_IRQ | INPORT_MODE_BASE, INPORT_DATA_PORT); in inport_interrupt()
77 outb(INPORT_REG_X, INPORT_CONTROL_PORT); in inport_interrupt()
80 outb(INPORT_REG_Y, INPORT_CONTROL_PORT); in inport_interrupt()
83 outb(INPORT_REG_BTNS, INPORT_CONTROL_PORT); in inport_interrupt()
90 outb(INPORT_REG_MODE, INPORT_CONTROL_PORT); in inport_interrupt()
91 outb(INPORT_MODE_IRQ | INPORT_MODE_BASE, INPORT_DATA_PORT); in inport_interrupt()
101 outb(INPORT_REG_MODE, INPORT_CONTROL_PORT); in inport_open()
102 outb(INPORT_MODE_IRQ | INPORT_MODE_BASE, INPORT_DATA_PORT); in inport_open()
109 outb(INPORT_REG_MODE, INPORT_CONTROL_PORT); in inport_close()
[all …]
/drivers/tty/
Dmxser.c294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_enable_must_enchance_mode()
299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_enable_must_enchance_mode()
300 outb(oldlcr, baseio + UART_LCR); in mxser_enable_must_enchance_mode()
310 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_disable_must_enchance_mode()
315 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_disable_must_enchance_mode()
316 outb(oldlcr, baseio + UART_LCR); in mxser_disable_must_enchance_mode()
326 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); in mxser_set_must_xon1_value()
332 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); in mxser_set_must_xon1_value()
333 outb(value, baseio + MOXA_MUST_XON1_REGISTER); in mxser_set_must_xon1_value()
334 outb(oldlcr, baseio + UART_LCR); in mxser_set_must_xon1_value()
[all …]
/drivers/bluetooth/
Dbluecard_cs.c171 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
187 outb(0x18 | 0x60, iobase + 0x30); in bluecard_enable_activity_led()
190 outb(0x00, iobase + 0x30); in bluecard_enable_activity_led()
266 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
310 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
314 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_write_wakeup()
342 outb(REG_COMMAND_RX_WIN_ONE, iobase + REG_COMMAND); in bluecard_read()
351 outb(REG_COMMAND_RX_WIN_TWO, iobase + REG_COMMAND); in bluecard_read()
514 outb(info->ctrl_reg, iobase + REG_CONTROL); in bluecard_interrupt()
522 outb(0x04, iobase + REG_INTERRUPT); in bluecard_interrupt()
[all …]
/drivers/gpio/
Dgpio-it87.c85 outb(0x87, REG); in superio_enter()
86 outb(0x01, REG); in superio_enter()
87 outb(0x55, REG); in superio_enter()
88 outb(0x55, REG); in superio_enter()
94 outb(0x02, REG); in superio_exit()
95 outb(0x02, VAL); in superio_exit()
101 outb(LDNREG, REG); in superio_select()
102 outb(ldn, VAL); in superio_select()
107 outb(reg, REG); in superio_inb()
113 outb(reg, REG); in superio_outb()
[all …]
/drivers/parisc/
Dsuperio.c100 outb (OCW3_POLL,IC_PIC1+0); in superio_interrupt()
129 outb(OCW3_ISR,IC_PIC1+0); in superio_interrupt()
143 outb((OCW2_SEOI|local_irq),IC_PIC1 + 0); in superio_interrupt()
244 outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */ in superio_init()
245 outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */ in superio_init()
246 outb (0x04,IC_PIC1+1); /* ICW3: Cascade */ in superio_init()
247 outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */ in superio_init()
250 outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */ in superio_init()
251 outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */ in superio_init()
254 outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */ in superio_init()
[all …]
/drivers/net/appletalk/
Dcops.c380 outb(0, ioaddr+DAYNA_RESET); in cops_irq()
387 outb(0, ioaddr); in cops_irq()
388 outb(0, ioaddr+TANG_RESET); in cops_irq()
491 outb(0,ioaddr); /* Clear the TANG_TX_READY flop. */ in cops_reset()
492 outb(0, ioaddr+TANG_RESET); /* Reset the adapter. */ in cops_reset()
495 outb(0, ioaddr+TANG_CLEAR_INT); in cops_reset()
499 outb(0, ioaddr+DAYNA_RESET); /* Assert the reset port */ in cops_reset()
577 outb(ltf->data[i], ioaddr); in cops_load()
586 outb(1, ioaddr+DAYNA_INT_CARD); in cops_load()
613 outb(0, ioaddr+COPS_CLEAR_INT); /* Clear interrupts. */ in cops_nodeid()
[all …]

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