| /drivers/net/ethernet/silan/ |
| D | sc92031.c | 266 void __iomem *port_base; member
308 static inline void _sc92031_dummy_read(void __iomem *port_base) in _sc92031_dummy_read() argument
310 ioread32(port_base + MAC0); in _sc92031_dummy_read()
313 static u32 _sc92031_mii_wait(void __iomem *port_base) in _sc92031_mii_wait() argument
319 mii_status = ioread32(port_base + Miistatus); in _sc92031_mii_wait()
325 static u32 _sc92031_mii_cmd(void __iomem *port_base, u32 cmd0, u32 cmd1) in _sc92031_mii_cmd() argument
327 iowrite32(Mii_Divider, port_base + Miicmd0); in _sc92031_mii_cmd()
329 _sc92031_mii_wait(port_base); in _sc92031_mii_cmd()
331 iowrite32(cmd1, port_base + Miicmd1); in _sc92031_mii_cmd()
332 iowrite32(Mii_Divider | cmd0, port_base + Miicmd0); in _sc92031_mii_cmd()
[all …]
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| /drivers/scsi/pcmcia/ |
| D | sym53c500_cs.c | 350 int port_base = dev->io_port; in SYM53C500_intr() local
360 REG1(port_base); in SYM53C500_intr()
361 pio_status = inb(port_base + PIO_STATUS); in SYM53C500_intr()
362 REG0(port_base); in SYM53C500_intr()
363 status = inb(port_base + STAT_REG); in SYM53C500_intr()
364 DEB(seq_reg = inb(port_base + SEQ_REG)); in SYM53C500_intr()
365 int_reg = inb(port_base + INT_REG); in SYM53C500_intr()
366 DEB(fifo_size = inb(port_base + FIFO_FLAGS) & 0x1f); in SYM53C500_intr()
417 outb(FLUSH_FIFO, port_base + CMD_REG); in SYM53C500_intr()
418 LOAD_DMA_COUNT(port_base, scsi_bufflen(curSC)); /* Max transfer size */ in SYM53C500_intr()
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| /drivers/ata/ |
| D | sata_inic162x.c | 271 static void inic_reset_port(void __iomem *port_base) in inic_reset_port() argument
273 void __iomem *idma_ctl = port_base + PORT_IDMA_CTL; in inic_reset_port()
288 writeb(0xff, port_base + PORT_IRQ_STAT); in inic_reset_port()
319 void __iomem *port_base = inic_port_base(ap); in inic_stop_idma() local
321 readb(port_base + PORT_RPQ_FIFO); in inic_stop_idma()
322 readb(port_base + PORT_RPQ_CNT); in inic_stop_idma()
323 writew(0, port_base + PORT_IDMA_CTL); in inic_stop_idma()
384 void __iomem *port_base = inic_port_base(ap); in inic_host_intr() local
390 irq_stat = readb(port_base + PORT_IRQ_STAT); in inic_host_intr()
391 writeb(irq_stat, port_base + PORT_IRQ_STAT); in inic_host_intr()
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| D | pdc_adma.c | 613 void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); in adma_ata_init_one() local
614 unsigned int offset = port_base - mmio_base; in adma_ata_init_one()
616 adma_ata_setup_port(&ap->ioaddr, port_base); in adma_ata_init_one()
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| D | sata_mv.c | 1286 void __iomem *port_base; in mv_dump_all_regs() local
1316 port_base = mv_port_base(mmio_base, p); in mv_dump_all_regs()
1318 mv_dump_mem(port_base, 0x54); in mv_dump_all_regs()
1320 mv_dump_mem(port_base+0x300, 0x60); in mv_dump_all_regs()
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| /drivers/phy/mediatek/ |
| D | phy-mtk-xsphy.c | 93 void __iomem *port_base; member
119 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
194 void __iomem *pbase = inst->port_base; in u2_phy_instance_init()
210 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_on()
229 void __iomem *pbase = inst->port_base; in u2_phy_instance_power_off()
251 tmp = readl(inst->port_base + XSP_U2PHYDTM1); in u2_phy_instance_set_mode()
266 writel(tmp, inst->port_base + XSP_U2PHYDTM1); in u2_phy_instance_set_mode()
308 void __iomem *pbase = inst->port_base; in u2_phy_props_set()
343 void __iomem *pbase = inst->port_base; in u3_phy_props_set()
560 inst->port_base = devm_ioremap_resource(&phy->dev, &res); in mtk_xsphy_probe()
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| D | phy-mtk-tphy.c | 292 void __iomem *port_base; member
795 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM; in phy_v1_banks_init()
801 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
802 u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA; in phy_v1_banks_init()
805 u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD; in phy_v1_banks_init()
821 u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC; in phy_v2_banks_init()
822 u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ; in phy_v2_banks_init()
823 u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM; in phy_v2_banks_init()
827 u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC; in phy_v2_banks_init()
828 u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP; in phy_v2_banks_init()
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| /drivers/net/ethernet/hisilicon/ |
| D | hisi_femac.c | 109 void __iomem *port_base; member
161 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; in hisi_femac_xmit_reclaim()
176 val = readl(priv->port_base + ADDRQ_STAT) & TX_CNT_INUSE_MASK; in hisi_femac_xmit_reclaim()
204 writel(status, priv->port_base + MAC_PORTSET); in hisi_femac_adjust_link()
219 while (readl(priv->port_base + ADDRQ_STAT) & BIT_RX_READY) { in hisi_femac_rx_refill()
239 writel(addr, priv->port_base + IQ_ADDR); in hisi_femac_rx_refill()
255 rx_pkt_info = readl(priv->port_base + IQFRM_DES); in hisi_femac_rx()
507 val = readl(priv->port_base + ADDRQ_STAT); in hisi_femac_net_xmit()
538 writel(addr, priv->port_base + EQ_ADDR); in hisi_femac_net_xmit()
539 writel(skb->len + ETH_FCS_LEN, priv->port_base + EQFRM_LEN); in hisi_femac_net_xmit()
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| /drivers/staging/mt7621-pci-phy/ |
| D | pci-mt7621-phy.c | 88 void __iomem *port_base; member
329 void __iomem *port_base; in mt7621_pci_phy_probe() local
354 port_base = devm_ioremap_resource(dev, res); in mt7621_pci_phy_probe()
355 if (IS_ERR(port_base)) { in mt7621_pci_phy_probe()
357 return PTR_ERR(port_base); in mt7621_pci_phy_probe()
360 phy->regmap = devm_regmap_init_mmio(phy->dev, port_base, in mt7621_pci_phy_probe()
381 instance->port_base = port_base; in mt7621_pci_phy_probe()
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| /drivers/net/dsa/ |
| D | dsa_loop.c | 54 unsigned int port_base; member
123 ret = mdiobus_read_nested(bus, ps->port_base + port, regnum); in dsa_loop_phy_read()
139 ret = mdiobus_write_nested(bus, ps->port_base + port, regnum, value); in dsa_loop_phy_write()
191 mdiobus_read(bus, ps->port_base + port, MII_BMSR); in dsa_loop_port_vlan_prepare()
210 mdiobus_read(bus, ps->port_base + port, MII_BMSR); in dsa_loop_port_vlan_add()
239 mdiobus_read(bus, ps->port_base + port, MII_BMSR); in dsa_loop_port_vlan_del()
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