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/Documentation/devicetree/bindings/rtc/
Dnxp,rtc-2123.txt1 NXP PCF2123 SPI Real Time Clock
4 - compatible: should be: "nxp,pcf2123"
6 - reg: should be the SPI slave chipselect address
9 - spi-cs-high: PCF2123 needs chipselect high
16 spi-cs-high;
Depson,rx6110.txt4 The Epson RX6110 can be used with SPI or I2C busses. The kind of
8 --------
11 - compatible: should be: "epson,rx6110"
12 - reg : the I2C address of the device for I2C
21 SPI mode
22 --------
25 - compatible: should be: "epson,rx6110"
26 - reg: chip select number
27 - spi-cs-high: RX6110 needs chipselect high
28 - spi-cpha: RX6110 works with SPI shifted clock phase
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Dmaxim-ds1302.txt1 * Maxim/Dallas Semiconductor DS-1302 RTC
5 The device uses the standard MicroWire half-duplex transfer timing.
12 - compatible : Should be "maxim,ds1302"
14 Required SPI properties:
16 - reg : Should be address of the device chip select within
19 - spi-max-frequency : DS-1302 has 500 kHz if powered at 2.2V,
22 - spi-3wire : The device has a shared signal IN/OUT line.
24 - spi-lsb-first : DS-1302 requires least significant bit first
27 - spi-cs-high: DS-1302 has active high chip select line. This is
32 spi@901c {
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/Documentation/devicetree/bindings/spi/
Dicpdas-lp8841-spi-rtc.txt1 * ICP DAS LP-8841 SPI Controller for RTC
3 ICP DAS LP-8841 contains a DS-1302 RTC. RTC is connected to an IO
4 memory register, which acts as an SPI master device.
6 The device uses the standard MicroWire half-duplex transfer timing.
13 - #address-cells: should be 1
15 - #size-cells: should be 0
17 - compatible: should be "icpdas,lp8841-spi-rtc"
19 - reg: should provide IO memory address
21 Requirements to SPI slave nodes:
23 - There can be only one slave device.
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Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI Controller Generic Binding
10 - Mark Brown <broonie@kernel.org>
13 SPI busses can be described with a node for the SPI controller device
14 and a set of child nodes for each SPI slave on the bus. The system SPI
15 controller may be described for use in SPI master mode or in SPI slave mode,
20 pattern: "^spi(@.*|-[0-9a-f])*$"
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Dspi-bcm63xx-hsspi.txt1 Binding for Broadcom BCM6328 High Speed SPI controller
4 - compatible: must contain of "brcm,bcm6328-hsspi".
5 - reg: Base address and size of the controllers memory area.
6 - interrupts: Interrupt for the SPI block.
7 - clocks: phandles of the SPI clock and the PLL clock.
8 - clock-names: must be "hsspi", "pll".
9 - #address-cells: <1>, as required by generic SPI binding.
10 - #size-cells: <0>, also as required by generic SPI binding.
13 - num-cs: some controllers have less than 8 cs signals. Defaults to 8
16 Child nodes as per the generic SPI binding.
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Dspi-nxp-fspi.txt4 - compatible : Should be "nxp,lx2160a-fspi"
5 - reg : First contains the register location and length,
7 - reg-names : Should contain the resource reg names:
8 - fspi_base: configuration register address space
9 - fspi_mmap: memory mapped address space
10 - interrupts : Should contain the interrupt for the device
12 Required SPI slave node properties:
13 - reg : There are two buses (A and B) with two chip selects each.
14 This encodes to which bus and CS the flash is connected:
15 - <0>: Bus A, CS 0
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Dqcom,spi-qup.txt1 Qualcomm Universal Peripheral (QUP) Serial Peripheral Interface (SPI)
4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
6 SPI in master mode supports up to 50MHz, up to four chip selects, programmable
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
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Dsh-msiof.txt1 Renesas MSIOF spi controller
4 - compatible : "renesas,msiof-r8a7743" (RZ/G1M)
5 "renesas,msiof-r8a7744" (RZ/G1N)
6 "renesas,msiof-r8a7745" (RZ/G1E)
7 "renesas,msiof-r8a77470" (RZ/G1C)
8 "renesas,msiof-r8a774a1" (RZ/G2M)
9 "renesas,msiof-r8a774c0" (RZ/G2E)
10 "renesas,msiof-r8a7790" (R-Car H2)
11 "renesas,msiof-r8a7791" (R-Car M2-W)
12 "renesas,msiof-r8a7792" (R-Car V2H)
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/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt1 === ST Microelectronics SPEAr SPI CS Driver ===
4 Cell spi controller through its system registers, which otherwise remains under
7 desired by some of the device protocols above spi which expect (multiple)
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
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/Documentation/devicetree/bindings/mfd/
Dcros-ec.txt3 Google's ChromeOS EC is a Cortex-M device which talks to the AP and
6 The EC can be connect through various means (I2C, SPI, LPC, RPMSG) and the
8 its own driver which connects to the top level interface-agnostic EC driver.
9 Other Linux driver (such as cros-ec-keyb for the matrix keyboard) connect to
10 the top-level driver.
13 - compatible: "google,cros-ec-i2c"
14 - reg: I2C slave address
16 Required properties (SPI):
17 - compatible: "google,cros-ec-spi"
18 - reg: SPI chip select
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Dmotorola-cpcap.txt4 - compatible : One or both of "motorola,cpcap" or "ste,6556002"
5 - reg : SPI chip select
6 - interrupts : The interrupt line the device is connected to
7 - interrupt-controller : Marks the device node as an interrupt controller
8 - #interrupt-cells : The number of cells to describe an IRQ, should be 2
9 - #address-cells : Child device offset number of cells, should be 1
10 - #size-cells : Child device size number of cells, should be 0
11 - spi-max-frequency : Typically set to 3000000
12 - spi-cs-high : SPI chip select direction
16 The sub-functions of CPCAP get their own node with their own compatible values,
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/Documentation/devicetree/bindings/misc/
Deeprom-93xx46.txt1 EEPROMs (SPI) compatible with Microchip Technology 93xx46 family.
4 - compatible : shall be one of:
6 "eeprom-93xx46"
7 - data-size : number of data bits per word (either 8 or 16)
10 - read-only : parameter-less property which disables writes to the EEPROM
11 - select-gpios : if present, specifies the GPIO that will be asserted prior to
12 each access to the EEPROM (e.g. for SPI bus multiplexing)
14 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
15 apply. In particular, "reg" and "spi-max-frequency" properties must be given.
19 compatible = "eeprom-93xx46";
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/Documentation/devicetree/bindings/display/panel/
Dkingdisplay,kd035g6-54nt.txt1 King Display KD035G6-54NT 3.5" (320x240 pixels) 24-bit TFT LCD panel
4 - compatible: should be "kingdisplay,kd035g6-54nt"
5 - power-supply: See panel-common.txt
6 - reset-gpios: See panel-common.txt
9 - backlight: see panel-common.txt
11 The generic bindings for the SPI slaves documented in [1] also apply.
17 [1]: Documentation/devicetree/bindings/spi/spi-bus.txt
22 &spi {
24 compatible = "kingdisplay,kd035g6-54nt";
27 spi-max-frequency = <3125000>;
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/Documentation/devicetree/bindings/pinctrl/
Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
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/Documentation/firmware-guide/acpi/
Dgpio-properties.rst1 .. SPDX-License-Identifier: GPL-2.0
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () {"reset-gpios", Package() {^BTH, 1, 1, 0 }},
35 Package () {"shutdown-gpios", Package() {^BTH, 0, 0, 0 }},
55 active low or high, the "active_low" argument can be used here. Setting
58 In our Bluetooth example the "reset-gpios" refers to the second GpioIo()
62 cases like with SPI host controllers where some chip selects may be
63 implemented as GPIOs and some as native signals. For example a SPI host
68 "cs-gpios",
82 - gpio-hog
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/Documentation/spi/
Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a master/slave configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI masters use a fourth "chip select" line to activate a given SPI slave
24 in parallel. All SPI slaves support chipselects; they are usually active
29 SPI slave functions are usually not interoperable between vendors
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/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
15 registers. Must contain an entry for each entry in the reg-names property.
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/Documentation/admin-guide/
Ddevices.txt1 0 Unnamed devices (e.g. non-device mounts)
11 6 = /dev/core OBSOLETE - replaced by /proc/kcore
18 12 = /dev/oldmem OBSOLETE - replaced by /proc/vmcore
31 2 char Pseudo-TTY masters
37 Pseudo-tty's are named as follows:
40 the 1st through 16th series of 16 pseudo-ttys each, and
44 These are the old-style (BSD) PTY devices; Unix98
80 28 = /dev/fd?u1440 3.5" 1440K High Density(1)
81 124 = /dev/fd?u1600 3.5" 1600K High Density(1)
82 44 = /dev/fd?u1680 3.5" 1680K High Density(3)
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/Documentation/virt/kvm/
Dapi.txt1 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
5 ----------------------
10 - System ioctls: These query and set global attributes which affect the
14 - VM ioctls: These query and set attributes that affect an entire virtual
21 - vcpu ioctls: These query and set attributes that control the operation
29 - device ioctls: These query and set attributes that control the operation
36 -------------------
73 -------------
77 facility that allows backward-compatible extensions to the API to be
87 ------------------
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