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Searched refs:imm (Results 1 – 25 of 46) sorted by relevance

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/arch/arm/net/
Dbpf_jit_32.h161 #define _AL3_I(op, rd, rn, imm) ((op ## _I) | (rd) << 12 | (rn) << 16 | (imm)) argument
167 #define ARM_ADD_I(rd, rn, imm) _AL3_I(ARM_INST_ADD, rd, rn, imm) argument
168 #define ARM_ADDS_I(rd, rn, imm) _AL3_I(ARM_INST_ADDS, rd, rn, imm) argument
170 #define ARM_ADC_I(rd, rn, imm) _AL3_I(ARM_INST_ADC, rd, rn, imm) argument
174 #define ARM_AND_I(rd, rn, imm) _AL3_I(ARM_INST_AND, rd, rn, imm) argument
177 #define ARM_BIC_I(rd, rn, imm) _AL3_I(ARM_INST_BIC, rd, rn, imm) argument
184 #define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) argument
187 #define ARM_EOR_I(rd, rn, imm) _AL3_I(ARM_INST_EOR, rd, rn, imm) argument
192 #define ARM_LDR_R_SI(rt, rn, rm, type, imm) \ argument
195 | (imm) << 7 | (type) << 5 | (rm))
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Dbpf_jit_32.c357 u16 imm; in imm_offset() local
383 imm = offset - (8 + ctx->idx * 4); in imm_offset()
385 if (imm & ~0xfff) { in imm_offset()
394 return imm; in imm_offset()
1337 const s32 imm = insn->imm; in build_insn() local
1344 #define check_imm(bits, imm) do { \ in build_insn() argument
1345 if ((imm) >= (1 << ((bits) - 1)) || \ in build_insn()
1346 (imm) < -(1 << ((bits) - 1))) { \ in build_insn()
1348 i, imm, imm); \ in build_insn()
1352 #define check_imm24(imm) check_imm(24, imm) in build_insn() argument
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/arch/nds32/mm/
Dalignment.c198 int imm, regular, load, len, addr_mode, idx_mode; in do_16() local
204 imm = 1; in do_16()
212 imm = 1; in do_16()
220 imm = 1; in do_16()
228 imm = 0; in do_16()
236 imm = 1; in do_16()
244 imm = 1; in do_16()
252 imm = 1; in do_16()
260 imm = 0; in do_16()
285 if (imm) in do_16()
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/arch/arm/probes/kprobes/
Dcheckers-common.c34 int imm = insn & 0xff; in checker_stack_use_imm_0xx() local
35 asi->stack_space = imm; in checker_stack_use_imm_0xx()
47 int imm = insn & 0xff; in checker_stack_use_t32strd() local
48 asi->stack_space = imm << 2; in checker_stack_use_t32strd()
56 int imm = ((insn & 0xf00) >> 4) + (insn & 0xf); in checker_stack_use_imm_x0x() local
57 asi->stack_space = imm; in checker_stack_use_imm_x0x()
66 int imm = insn & 0xfff; in checker_stack_use_imm_xxx() local
67 asi->stack_space = imm; in checker_stack_use_imm_xxx()
/arch/powerpc/net/
Dbpf_jit_comp64.c308 s32 imm = insn[i].imm; in bpf_jit_build_body() local
354 imm = -imm; in bpf_jit_build_body()
355 if (imm) { in bpf_jit_build_body()
356 if (imm >= -32768 && imm < 32768) in bpf_jit_build_body()
357 PPC_ADDI(dst_reg, dst_reg, IMM_L(imm)); in bpf_jit_build_body()
359 PPC_LI32(b2p[TMP_REG_1], imm); in bpf_jit_build_body()
373 if (imm >= -32768 && imm < 32768) in bpf_jit_build_body()
374 PPC_MULI(dst_reg, dst_reg, IMM_L(imm)); in bpf_jit_build_body()
376 PPC_LI32(b2p[TMP_REG_1], imm); in bpf_jit_build_body()
409 if (imm == 0) in bpf_jit_build_body()
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/arch/s390/net/
Dbpf_jit_comp.c182 #define EMIT4_IMM(op, b1, imm) \ argument
184 unsigned int __imm = (imm) & 0xffff; \
236 #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \ argument
240 (rel & 0xffff), op2 | (imm & 0xff) << 8); \
242 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \
267 #define _EMIT6_IMM(op, imm) \ argument
269 unsigned int __imm = (imm); \
273 #define EMIT6_IMM(op, b1, imm) \ argument
275 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
514 s32 imm = insn->imm; in bpf_jit_insn() local
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/arch/arm/kvm/
Dtrace.h59 TP_PROTO(unsigned long vcpu_pc, unsigned long r0, unsigned long imm),
60 TP_ARGS(vcpu_pc, r0, imm),
65 __field( unsigned long, imm )
71 __entry->imm = imm;
75 __entry->vcpu_pc, __entry->r0, __entry->imm)
/arch/arm64/kernel/
Dinsn.c318 u32 insn, u64 imm) in aarch64_insn_encode_immediate() argument
329 immlo = (imm & ADR_IMM_LOMASK) << ADR_IMM_LOSHIFT; in aarch64_insn_encode_immediate()
330 imm >>= ADR_IMM_HILOSPLIT; in aarch64_insn_encode_immediate()
331 immhi = (imm & ADR_IMM_HIMASK) << ADR_IMM_HISHIFT; in aarch64_insn_encode_immediate()
332 imm = immlo | immhi; in aarch64_insn_encode_immediate()
346 insn |= (imm & mask) << shift; in aarch64_insn_encode_immediate()
838 int imm, enum aarch64_insn_variant variant, in aarch64_insn_gen_add_sub_imm() argument
873 if (imm & ~(BIT(24) - 1)) in aarch64_insn_gen_add_sub_imm()
877 if (imm & ~(SZ_4K - 1)) { in aarch64_insn_gen_add_sub_imm()
879 if (imm & (SZ_4K - 1)) in aarch64_insn_gen_add_sub_imm()
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Dmodule.c155 u64 imm; in reloc_insn_movw() local
160 imm = sval >> lsb; in reloc_insn_movw()
179 imm = ~imm; in reloc_insn_movw()
184 insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_16, insn, imm); in reloc_insn_movw()
187 if (imm > U16_MAX) in reloc_insn_movw()
196 u64 imm, imm_mask; in reloc_insn_imm() local
206 imm = sval & imm_mask; in reloc_insn_imm()
209 insn = aarch64_insn_encode_immediate(imm_type, insn, imm); in reloc_insn_imm()
/arch/arm64/net/
Dbpf_jit_comp.c352 const s32 imm = insn->imm; in build_insn() local
360 #define check_imm(bits, imm) do { \ in build_insn() argument
361 if ((((imm) > 0) && ((imm) >> (bits))) || \ in build_insn()
362 (((imm) < 0) && (~(imm) >> (bits)))) { \ in build_insn()
364 i, imm, imm); \ in build_insn()
368 #define check_imm19(imm) check_imm(19, imm) in build_insn() argument
369 #define check_imm26(imm) check_imm(26, imm) in build_insn() argument
443 switch (imm) { in build_insn()
459 switch (imm) { in build_insn()
476 emit_a64_mov_i(is64, dst, imm, ctx); in build_insn()
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/arch/microblaze/kernel/
Dftrace.c103 static unsigned int imm; /* saving whole imm instruction */ variable
135 imm = *(unsigned int *)rec->ip; in ftrace_make_nop()
136 pr_debug("%s: imm:0x%x\n", __func__, imm); in ftrace_make_nop()
157 __func__, (unsigned int)addr, (unsigned int)rec->ip, imm); in ftrace_make_call()
158 ret = ftrace_modify_code(rec->ip, imm); in ftrace_make_call()
/arch/sparc/net/
Dbpf_jit_comp_64.c298 static void emit_alu_K(unsigned int opcode, unsigned int dst, unsigned int imm, in emit_alu_K() argument
301 bool small_immed = is_simm13(imm); in emit_alu_K()
306 emit(insn | IMMED | S13(imm), ctx); in emit_alu_K()
312 emit_set_const_sext(imm, tmp, ctx); in emit_alu_K()
317 static void emit_alu3_K(unsigned int opcode, unsigned int src, unsigned int imm, in emit_alu3_K() argument
320 bool small_immed = is_simm13(imm); in emit_alu3_K()
325 emit(insn | IMMED | S13(imm), ctx); in emit_alu3_K()
331 emit_set_const_sext(imm, tmp, ctx); in emit_alu3_K()
636 const u8 dst, s32 imm, struct jit_ctx *ctx) in emit_cbcondi() argument
640 emit(cb_opc | IMMED | WDISP10(off << 2) | RS1(dst) | S5(imm), ctx); in emit_cbcondi()
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/arch/csky/abiv1/
Dalignment.c219 uint32_t imm = 0; in csky_alignment() local
254 imm = (opcode >> 4) & 0xf; in csky_alignment()
263 addr = get_ptreg(regs, rx) + (imm << 1); in csky_alignment()
267 addr = get_ptreg(regs, rx) + (imm << 2); in csky_alignment()
271 addr = get_ptreg(regs, rx) + (imm << 1); in csky_alignment()
275 addr = get_ptreg(regs, rx) + (imm << 2); in csky_alignment()
294 __func__, opcode, rz, rx, imm, addr); in csky_alignment()
/arch/sh/kernel/
Ddisassemble.c300 int imm = 0; in print_sh_insn() local
317 imm = (nibs[2] << 4) | (nibs[3]); in print_sh_insn()
318 if (imm & 0x80) in print_sh_insn()
319 imm |= ~0xff; in print_sh_insn()
320 imm = ((char)imm) * 2 + 4 ; in print_sh_insn()
323 imm = ((nibs[1]) << 8) | (nibs[2] << 4) | (nibs[3]); in print_sh_insn()
324 if (imm & 0x800) in print_sh_insn()
325 imm |= ~0xfff; in print_sh_insn()
326 imm = imm * 2 + 4; in print_sh_insn()
329 imm = nibs[3]; in print_sh_insn()
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/arch/mips/net/
Debpf_jit.c411 if (insn->imm >= S16_MIN && insn->imm <= S16_MAX) { in gen_imm_to_reg()
412 emit_instr(ctx, addiu, reg, MIPS_R_ZERO, insn->imm); in gen_imm_to_reg()
414 int lower = (s16)(insn->imm & 0xffff); in gen_imm_to_reg()
415 int upper = insn->imm - lower; in gen_imm_to_reg()
473 if (insn->imm >= lower_bound && insn->imm <= upper_bound) { in gen_imm_insn()
477 emit_instr(ctx, daddiu, dst, MIPS_R_ZERO, insn->imm); in gen_imm_insn()
481 emit_instr(ctx, andi, dst, dst, insn->imm); in gen_imm_insn()
485 emit_instr(ctx, ori, dst, dst, insn->imm); in gen_imm_insn()
489 emit_instr(ctx, xori, dst, dst, insn->imm); in gen_imm_insn()
492 emit_instr(ctx, daddiu, dst, dst, insn->imm); in gen_imm_insn()
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/arch/riscv/net/
Dbpf_jit_comp.c198 u32 imm; in rv_uj_insn() local
200 imm = (imm20_1 & 0x80000) | ((imm20_1 & 0x3ff) << 9) | in rv_uj_insn()
203 return (imm << 12) | (rd << 7) | opcode; in rv_uj_insn()
738 s32 imm = insn->imm; in emit_insn() local
746 if (imm == 1) { in emit_insn()
836 int shift = 64 - imm; in emit_insn()
849 if (imm == 16) in emit_insn()
861 if (imm == 32) in emit_insn()
893 emit_imm(rd, imm, ctx); in emit_insn()
901 if (is_12b_int(imm)) { in emit_insn()
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/arch/arm64/kernel/probes/
Dsimulate-insn.c89 long imm, xn, val; in simulate_adr_adrp() local
92 imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3); in simulate_adr_adrp()
93 imm = sign_extend64(imm, 20); in simulate_adr_adrp()
95 val = (imm<<12) + (addr & 0xfffffffffffff000); in simulate_adr_adrp()
97 val = imm + addr; in simulate_adr_adrp()
/arch/ia64/kernel/
Dunaligned.c171 unsigned long imm:7; /* [13:19] */ member
694 unsigned long imm; in emulate_load_updates() local
702 imm = ld.x << 7 | ld.imm; in emulate_load_updates()
707 if (ld.m) imm |= SIGN_EXT9; in emulate_load_updates()
713 ifa += imm; in emulate_load_updates()
717 DPRINT("ld.x=%d ld.m=%d imm=%ld r3=0x%lx\n", ld.x, ld.m, imm, ifa); in emulate_load_updates()
739 getreg(ld.imm, &r2, &nat_r2, regs); in emulate_load_updates()
748 DPRINT("imm=%d r2=%ld r3=0x%lx nat_r2=%d\n",ld.imm, r2, ifa, nat_r2); in emulate_load_updates()
886 getreg(ld.imm, &r2, NULL, regs); in emulate_store_int()
915 unsigned long imm; in emulate_store_int() local
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Dpatch.c223 u64 ip, mask, imm; in ia64_patch_phys_stack_reg() local
227 imm = (((val >> 7) & 0x3f) << 27) | (val & 0x7f) << 13; in ia64_patch_phys_stack_reg()
231 ia64_patch(ip, mask, imm); in ia64_patch_phys_stack_reg()
/arch/powerpc/lib/
Dcode-patching.c316 signed long imm; in branch_iform_target() local
318 imm = *instr & 0x3FFFFFC; in branch_iform_target()
321 if (imm & 0x2000000) in branch_iform_target()
322 imm -= 0x4000000; in branch_iform_target()
325 imm += (unsigned long)instr; in branch_iform_target()
327 return (unsigned long)imm; in branch_iform_target()
332 signed long imm; in branch_bform_target() local
334 imm = *instr & 0xFFFC; in branch_bform_target()
337 if (imm & 0x8000) in branch_bform_target()
338 imm -= 0x10000; in branch_bform_target()
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Dsstep.c1169 unsigned long int imm; in analyse_instr() local
1180 imm = (signed short)(instr & 0xfffc); in analyse_instr()
1182 imm += regs->nip; in analyse_instr()
1183 op->val = truncate_if_32bit(regs->msr, imm); in analyse_instr()
1199 imm = instr & 0x03fffffc; in analyse_instr()
1200 if (imm & 0x02000000) in analyse_instr()
1201 imm -= 0x04000000; in analyse_instr()
1203 imm += regs->nip; in analyse_instr()
1204 op->val = truncate_if_32bit(regs->msr, imm); in analyse_instr()
1223 imm = (instr & 0x400)? regs->ctr: regs->link; in analyse_instr()
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/arch/arm64/kvm/
Dtrace.h30 TP_PROTO(unsigned long vcpu_pc, unsigned long r0, unsigned long imm),
31 TP_ARGS(vcpu_pc, r0, imm),
36 __field(unsigned long, imm)
42 __entry->imm = imm;
46 __entry->vcpu_pc, __entry->r0, __entry->imm)
/arch/x86/tools/
Dgen-insn-attr-x86.awk239 function convert_operands(count,opnd, i,j,imm,mod)
241 imm = null
248 if (imm) {
251 imm = add_flags(imm, "INAT_SCNDIMM")
253 imm = imm_flag[i]
257 return add_flags(imm, mod)
/arch/nds32/kernel/
Dftrace.c107 unsigned long imm = addr >> 12; in gen_sethi_insn() local
110 return ENDIAN_CONVERT(opcode | rt_num | imm); in gen_sethi_insn()
116 unsigned long imm = addr & 0x0000fff; in gen_ori_insn() local
120 return ENDIAN_CONVERT(opcode | rt_num | ra_num | imm); in gen_ori_insn()
/arch/openrisc/kernel/
Dtraps.c355 long imm; in simulate_lwa() local
364 imm = (short)insn; in simulate_lwa()
365 lwa_addr = (unsigned long __user *)(regs->gpr[ra] + imm); in simulate_lwa()
397 long imm; in simulate_swa() local
406 imm = (short)(((insn & 0x2200000) >> 10) | (insn & 0x7ff)); in simulate_swa()
407 vaddr = (unsigned long __user *)(regs->gpr[ra] + imm); in simulate_swa()

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