1Qualcomm Global Clock & Reset Controller Binding 2------------------------------------------------ 3 4Required properties : 5- compatible : shall contain only one of the following: 6 7 "qcom,gcc-apq8064" 8 "qcom,gcc-apq8084" 9 "qcom,gcc-ipq8064" 10 "qcom,gcc-ipq4019" 11 "qcom,gcc-ipq8074" 12 "qcom,gcc-msm8660" 13 "qcom,gcc-msm8916" 14 "qcom,gcc-msm8960" 15 "qcom,gcc-msm8974" 16 "qcom,gcc-msm8974pro" 17 "qcom,gcc-msm8974pro-ac" 18 "qcom,gcc-msm8994" 19 "qcom,gcc-msm8996" 20 "qcom,gcc-msm8998" 21 "qcom,gcc-mdm9615" 22 "qcom,gcc-qcs404" 23 "qcom,gcc-sdm630" 24 "qcom,gcc-sdm660" 25 "qcom,gcc-sdm845" 26 "qcom,gcc-sm8150" 27 28- reg : shall contain base register location and length 29- #clock-cells : shall contain 1 30- #reset-cells : shall contain 1 31 32Optional properties : 33- #power-domain-cells : shall contain 1 34- Qualcomm TSENS (thermal sensor device) on some devices can 35be part of GCC and hence the TSENS properties can also be 36part of the GCC/clock-controller node. 37For more details on the TSENS properties please refer 38Documentation/devicetree/bindings/thermal/qcom-tsens.txt 39- protected-clocks : Protected clock specifier list as per common clock 40 binding. 41 42For SM8150 only: 43 - clocks: a list of phandles and clock-specifier pairs, 44 one for each entry in clock-names. 45 - clock-names: "bi_tcxo" (required) 46 "sleep_clk" (optional) 47 "aud_ref_clock" (optional) 48 49Example: 50 clock-controller@900000 { 51 compatible = "qcom,gcc-msm8960"; 52 reg = <0x900000 0x4000>; 53 #clock-cells = <1>; 54 #reset-cells = <1>; 55 #power-domain-cells = <1>; 56 }; 57 58Example of GCC with TSENS properties: 59 clock-controller@900000 { 60 compatible = "qcom,gcc-apq8064"; 61 reg = <0x00900000 0x4000>; 62 nvmem-cells = <&tsens_calib>, <&tsens_backup>; 63 nvmem-cell-names = "calib", "calib_backup"; 64 #clock-cells = <1>; 65 #reset-cells = <1>; 66 #thermal-sensor-cells = <1>; 67 }; 68 69Example of GCC with protected-clocks properties: 70 clock-controller@100000 { 71 compatible = "qcom,gcc-sdm845"; 72 reg = <0x100000 0x1f0000>; 73 #clock-cells = <1>; 74 #reset-cells = <1>; 75 #power-domain-cells = <1>; 76 protected-clocks = <GCC_QSPI_CORE_CLK>, 77 <GCC_QSPI_CORE_CLK_SRC>, 78 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 79 <GCC_LPASS_Q6_AXI_CLK>, 80 <GCC_LPASS_SWAY_CLK>; 81 }; 82 83Example of GCC with clocks 84 gcc: clock-controller@100000 { 85 compatible = "qcom,gcc-sm8150"; 86 reg = <0x00100000 0x1f0000>; 87 #clock-cells = <1>; 88 #reset-cells = <1>; 89 #power-domain-cells = <1>; 90 clock-names = "bi_tcxo", 91 "sleep_clk"; 92 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 93 <&sleep_clk>; 94 }; 95