1Qualcomm Graphics Clock & Reset Controller Binding 2-------------------------------------------------- 3 4Required properties : 5- compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc" 6- reg : shall contain base register location and length 7- #clock-cells : from common clock binding, shall contain 1 8- #reset-cells : from common reset binding, shall contain 1 9- #power-domain-cells : from generic power domain binding, shall contain 1 10- clocks : shall contain the XO clock 11 shall contain the gpll0 out main clock (msm8998) 12- clock-names : shall be "xo" 13 shall be "gpll0" (msm8998) 14 15Example: 16 gpucc: clock-controller@5090000 { 17 compatible = "qcom,sdm845-gpucc"; 18 reg = <0x5090000 0x9000>; 19 #clock-cells = <1>; 20 #reset-cells = <1>; 21 #power-domain-cells = <1>; 22 clocks = <&rpmhcc RPMH_CXO_CLK>; 23 clock-names = "xo"; 24 }; 25