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1* Qualcomm Atheros ath10k wireless devices
2
3Required properties:
4- compatible: Should be one of the following:
5	* "qcom,ath10k"
6	* "qcom,ipq4019-wifi"
7	* "qcom,wcn3990-wifi"
8
9PCI based devices uses compatible string "qcom,ath10k" and takes calibration
10data along with board specific data via "qcom,ath10k-calibration-data".
11Rest of the properties are not applicable for PCI based devices.
12
13AHB based devices (i.e. ipq4019) uses compatible string "qcom,ipq4019-wifi"
14and also uses most of the properties defined in this doc (except
15"qcom,ath10k-calibration-data"). It uses "qcom,ath10k-pre-calibration-data"
16to carry pre calibration data.
17
18In general, entry "qcom,ath10k-pre-calibration-data" and
19"qcom,ath10k-calibration-data" conflict with each other and only one
20can be provided per device.
21
22SNOC based devices (i.e. wcn3990) uses compatible string "qcom,wcn3990-wifi".
23
24- reg: Address and length of the register set for the device.
25- reg-names: Must include the list of following reg names,
26	     "membase"
27- interrupts: reference to the list of 17 interrupt numbers for "qcom,ipq4019-wifi"
28	      compatible target.
29	      reference to the list of 12 interrupt numbers for "qcom,wcn3990-wifi"
30	      compatible target.
31	      Must contain interrupt-names property per entry for
32	      "qcom,ath10k", "qcom,ipq4019-wifi" compatible targets.
33
34- interrupt-names: Must include the entries for MSI interrupt
35		   names ("msi0" to "msi15") and legacy interrupt
36		   name ("legacy") for "qcom,ath10k", "qcom,ipq4019-wifi"
37		   compatible targets.
38
39Optional properties:
40- resets: Must contain an entry for each entry in reset-names.
41          See ../reset/reseti.txt for details.
42- reset-names: Must include the list of following reset names,
43	       "wifi_cpu_init"
44	       "wifi_radio_srif"
45	       "wifi_radio_warm"
46	       "wifi_radio_cold"
47	       "wifi_core_warm"
48	       "wifi_core_cold"
49- clocks: List of clock specifiers, must contain an entry for each required
50          entry in clock-names.
51- clock-names: Should contain the clock names "wifi_wcss_cmd", "wifi_wcss_ref",
52	       "wifi_wcss_rtc" for "qcom,ipq4019-wifi" compatible target and
53	       "cxo_ref_clk_pin" for "qcom,wcn3990-wifi"
54	       compatible target.
55- qcom,msi_addr: MSI interrupt address.
56- qcom,msi_base: Base value to add before writing MSI data into
57		MSI address register.
58- qcom,ath10k-calibration-variant: string to search for in the board-2.bin
59				   variant list with the same bus and device
60				   specific ids
61- qcom,ath10k-calibration-data : calibration data + board specific data
62				 as an array, the length can vary between
63				 hw versions.
64- qcom,ath10k-pre-calibration-data : pre calibration data as an array,
65				     the length can vary between hw versions.
66- <supply-name>-supply: handle to the regulator device tree node
67			   optional "supply-name" are "vdd-0.8-cx-mx",
68			   "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0".
69- memory-region:
70	Usage: optional
71	Value type: <phandle>
72	Definition: reference to the reserved-memory for the msa region
73		    used by the wifi firmware running in Q6.
74- iommus:
75	Usage: optional
76	Value type: <prop-encoded-array>
77	Definition: A list of phandle and IOMMU specifier pairs.
78- ext-fem-name:
79	Usage: Optional
80	Value type: string
81	Definition: Name of external front end module used. Some valid FEM names
82		    for example: "microsemi-lx5586", "sky85703-11"
83		    and "sky85803" etc.
84- qcom,snoc-host-cap-8bit-quirk:
85	Usage: Optional
86	Value type: <empty>
87	Definition: Quirk specifying that the firmware expects the 8bit version
88		    of the host capability QMI request
89
90
91Example (to supply PCI based wifi block details):
92
93In this example, the node is defined as child node of the PCI controller.
94
95pci {
96	pcie@0 {
97		reg = <0 0 0 0 0>;
98		#interrupt-cells = <1>;
99		#size-cells = <2>;
100		#address-cells = <3>;
101		device_type = "pci";
102
103		wifi@0,0 {
104			reg = <0 0 0 0 0>;
105			qcom,ath10k-calibration-data = [ 01 02 03 ... ];
106			ext-fem-name = "microsemi-lx5586";
107		};
108	};
109};
110
111Example (to supply ipq4019 SoC wifi block details):
112
113wifi0: wifi@a000000 {
114	compatible = "qcom,ipq4019-wifi";
115	reg = <0xa000000 0x200000>;
116	resets = <&gcc WIFI0_CPU_INIT_RESET>,
117		 <&gcc WIFI0_RADIO_SRIF_RESET>,
118		 <&gcc WIFI0_RADIO_WARM_RESET>,
119		 <&gcc WIFI0_RADIO_COLD_RESET>,
120		 <&gcc WIFI0_CORE_WARM_RESET>,
121		 <&gcc WIFI0_CORE_COLD_RESET>;
122	reset-names = "wifi_cpu_init",
123		      "wifi_radio_srif",
124		      "wifi_radio_warm",
125		      "wifi_radio_cold",
126		      "wifi_core_warm",
127		      "wifi_core_cold";
128	clocks = <&gcc GCC_WCSS2G_CLK>,
129		 <&gcc GCC_WCSS2G_REF_CLK>,
130		 <&gcc GCC_WCSS2G_RTC_CLK>;
131	clock-names = "wifi_wcss_cmd",
132		      "wifi_wcss_ref",
133		      "wifi_wcss_rtc";
134	interrupts = <0 0x20 0x1>,
135		     <0 0x21 0x1>,
136		     <0 0x22 0x1>,
137		     <0 0x23 0x1>,
138		     <0 0x24 0x1>,
139		     <0 0x25 0x1>,
140		     <0 0x26 0x1>,
141		     <0 0x27 0x1>,
142		     <0 0x28 0x1>,
143		     <0 0x29 0x1>,
144		     <0 0x2a 0x1>,
145		     <0 0x2b 0x1>,
146		     <0 0x2c 0x1>,
147		     <0 0x2d 0x1>,
148		     <0 0x2e 0x1>,
149		     <0 0x2f 0x1>,
150		     <0 0xa8 0x0>;
151	interrupt-names = "msi0",  "msi1",  "msi2",  "msi3",
152			  "msi4",  "msi5",  "msi6",  "msi7",
153			  "msi8",  "msi9",  "msi10", "msi11",
154			  "msi12", "msi13", "msi14", "msi15",
155			  "legacy";
156	qcom,msi_addr = <0x0b006040>;
157	qcom,msi_base = <0x40>;
158	qcom,ath10k-pre-calibration-data = [ 01 02 03 ... ];
159};
160
161Example (to supply wcn3990 SoC wifi block details):
162
163wifi@18000000 {
164		compatible = "qcom,wcn3990-wifi";
165		reg = <0x18800000 0x800000>;
166		reg-names = "membase";
167		clocks = <&clock_gcc clk_rf_clk2_pin>;
168		clock-names = "cxo_ref_clk_pin";
169		interrupts =
170			<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
171			<GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
172			<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
173			<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
174			<GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
175			<GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
176			<GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
177			<GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
178			<GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
179			<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
180			<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
181			<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
182		vdd-0.8-cx-mx-supply = <&pm8998_l5>;
183		vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
184		vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
185		vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
186		memory-region = <&wifi_msa_mem>;
187		iommus = <&apps_smmu 0x0040 0x1>;
188};
189