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1* Freescale (Enhanced) Configurable Serial Peripheral Interface
2  (CSPI/eCSPI) for i.MX
3
4Required properties:
5- compatible :
6  - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7  - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8  - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9  - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10  - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11  - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12  - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13  - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M
14- reg : Offset and length of the register set for the device
15- interrupts : Should contain CSPI/eCSPI interrupt
16- clocks : Clock specifiers for both ipg and per clocks.
17- clock-names : Clock names should include both "ipg" and "per"
18See the clock consumer binding,
19	Documentation/devicetree/bindings/clock/clock-bindings.txt
20
21Recommended properties:
22- cs-gpios : GPIOs to use as chip selects, see spi-bus.txt.  While the native chip
23select lines can be used, they appear to always generate a pulse between each
24word of a transfer.  Most use cases will require GPIO based chip selects to
25generate a valid transaction.
26
27Optional properties:
28- num-cs :  Number of total chip selects, see spi-bus.txt.
29- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
30Documentation/devicetree/bindings/dma/dma.txt.
31- dma-names: DMA request names, if present, should include "tx" and "rx".
32- fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register
33controlling the SPI_READY handling. Note that to enable the DRCTL consideration,
34the SPI_READY mode-flag needs to be set too.
35Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
36
37Obsolete properties:
38- fsl,spi-num-chipselects : Contains the number of the chipselect
39
40Example:
41
42ecspi@70010000 {
43	#address-cells = <1>;
44	#size-cells = <0>;
45	compatible = "fsl,imx51-ecspi";
46	reg = <0x70010000 0x4000>;
47	interrupts = <36>;
48	cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
49		   <&gpio3 25 0>; /* GPIO3_25 */
50	dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
51	dma-names = "rx", "tx";
52	fsl,spi-rdy-drctl = <1>;
53};
54