1Freescale i.MX General Purpose Timer (GPT) 2 3Required properties: 4 5- compatible : should be one of following: 6 for i.MX1: 7 - "fsl,imx1-gpt"; 8 for i.MX21: 9 - "fsl,imx21-gpt"; 10 for i.MX27: 11 - "fsl,imx27-gpt", "fsl,imx21-gpt"; 12 for i.MX31: 13 - "fsl,imx31-gpt"; 14 for i.MX25: 15 - "fsl,imx25-gpt", "fsl,imx31-gpt"; 16 for i.MX50: 17 - "fsl,imx50-gpt", "fsl,imx31-gpt"; 18 for i.MX51: 19 - "fsl,imx51-gpt", "fsl,imx31-gpt"; 20 for i.MX53: 21 - "fsl,imx53-gpt", "fsl,imx31-gpt"; 22 for i.MX6Q: 23 - "fsl,imx6q-gpt", "fsl,imx31-gpt"; 24 for i.MX6DL: 25 - "fsl,imx6dl-gpt"; 26 for i.MX6SL: 27 - "fsl,imx6sl-gpt", "fsl,imx6dl-gpt"; 28 for i.MX6SX: 29 - "fsl,imx6sx-gpt", "fsl,imx6dl-gpt"; 30- reg : specifies base physical address and size of the registers. 31- interrupts : should be the gpt interrupt. 32- clocks : the clocks provided by the SoC to drive the timer, must contain 33 an entry for each entry in clock-names. 34- clock-names : must include "ipg" entry first, then "per" entry. 35 36Example: 37 38gpt1: timer@10003000 { 39 compatible = "fsl,imx27-gpt", "fsl,imx21-gpt"; 40 reg = <0x10003000 0x1000>; 41 interrupts = <26>; 42 clocks = <&clks IMX27_CLK_GPT1_IPG_GATE>, 43 <&clks IMX27_CLK_PER1_GATE>; 44 clock-names = "ipg", "per"; 45}; 46