1* USB2 ChipIdea USB controller for ci13xxx 2 3Required properties: 4- compatible: should be one of: 5 "fsl,imx23-usb" 6 "fsl,imx27-usb" 7 "fsl,imx28-usb" 8 "fsl,imx6q-usb" 9 "fsl,imx6sl-usb" 10 "fsl,imx6sx-usb" 11 "fsl,imx6ul-usb" 12 "fsl,imx7d-usb" 13 "fsl,imx7ulp-usb" 14 "lsi,zevio-usb" 15 "qcom,ci-hdrc" 16 "chipidea,usb2" 17 "xlnx,zynq-usb-2.20a" 18- reg: base address and length of the registers 19- interrupts: interrupt for the USB controller 20 21Recommended properies: 22- phy_type: the type of the phy connected to the core. Should be one 23 of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this 24 property the PORTSC register won't be touched. 25- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg" 26 27Deprecated properties: 28- usb-phy: phandle for the PHY device. Use "phys" instead. 29- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead. 30 31Optional properties: 32- clocks: reference to the USB clock 33- phys: reference to the USB PHY 34- phy-names: should be "usb-phy" 35- vbus-supply: reference to the VBUS regulator 36- maximum-speed: limit the maximum connection speed to "full-speed". 37- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts 38- itc-setting: interrupt threshold control register control, the setting 39 should be aligned with ITC bits at register USBCMD. 40- ahb-burst-config: it is vendor dependent, the required value should be 41 aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This 42 property is used to change AHB burst configuration, check the chipidea 43 spec for meaning of each value. If this property is not existed, it 44 will use the reset value. 45- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword 46 (4 bytes), This register represents the maximum length of a the burst 47 in 32-bit words while moving data from system memory to the USB 48 bus, the value of this property will only take effect if property 49 "ahb-burst-config" is set to 0, if this property is missing the reset 50 default of the hardware implementation will be used. 51- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword 52 (4 bytes), This register represents the maximum length of a the burst 53 in 32-bit words while moving data from the USB bus to system memory, 54 the value of this property will only take effect if property 55 "ahb-burst-config" is set to 0, if this property is missing the reset 56 default of the hardware implementation will be used. 57- extcon: phandles to external connector devices. First phandle should point to 58 external connector, which provide "USB" cable events, the second should point 59 to external connector device, which provide "USB-HOST" cable events. If one 60 of the external connector devices is not required, empty <0> phandle should 61 be specified. 62- phy-clkgate-delay-us: the delay time (us) between putting the PHY into 63 low power mode and gating the PHY clock. 64- non-zero-ttctrl-ttha: after setting this property, the value of register 65 ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default 66 value. It needs to be very carefully for setting this property, it is 67 recommended that consult with your IC engineer before setting this value. 68 On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this 69 property only affects siTD. 70 If this property is not set, the max packet size is 1023 bytes, and if 71 the total of packet size for pervious transactions are more than 256 bytes, 72 it can't accept any transactions within this frame. The use case is single 73 transaction, but higher frame rate. 74 If this property is set, the max packet size is 188 bytes, it can handle 75 more transactions than above case, it can accept transactions until it 76 considers the left room size within frame is less than 188 bytes, software 77 needs to make sure it does not send more than 90% 78 maximum_periodic_data_per_frame. The use case is multiple transactions, but 79 less frame rate. 80- mux-controls: The mux control for toggling host/device output of this 81 controller. It's expected that a mux state of 0 indicates device mode and a 82 mux state of 1 indicates host mode. 83- mux-control-names: Shall be "usb_switch" if mux-controls is specified. 84- pinctrl-names: Names for optional pin modes in "default", "host", "device". 85 In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this 86 case, the "idle" state needs to pull down the data and strobe pin 87 and the "active" state needs to pull up the strobe pin. 88- pinctrl-n: alternate pin modes 89 90i.mx specific properties 91- fsl,usbmisc: phandler of non-core register device, with one 92 argument that indicate usb controller index 93- disable-over-current: disable over current detect 94- over-current-active-low: over current signal polarity is active low. 95- over-current-active-high: over current signal polarity is active high. 96 It's recommended to specify the over current polarity. 97- power-active-high: power signal polarity is active high 98- external-vbus-divider: enables off-chip resistor divider for Vbus 99 100Example: 101 102 usb@f7ed0000 { 103 compatible = "chipidea,usb2"; 104 reg = <0xf7ed0000 0x10000>; 105 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 106 clocks = <&chip CLKID_USB0>; 107 phys = <&usb_phy0>; 108 phy-names = "usb-phy"; 109 vbus-supply = <®_usb0_vbus>; 110 itc-setting = <0x4>; /* 4 micro-frames */ 111 /* Incremental burst of unspecified length */ 112 ahb-burst-config = <0x0>; 113 tx-burst-size-dword = <0x10>; /* 64 bytes */ 114 rx-burst-size-dword = <0x10>; 115 extcon = <0>, <&usb_id>; 116 phy-clkgate-delay-us = <400>; 117 mux-controls = <&usb_switch>; 118 mux-control-names = "usb_switch"; 119 }; 120 121Example for HSIC: 122 123 usb@2184400 { 124 compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; 125 reg = <0x02184400 0x200>; 126 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; 127 clocks = <&clks IMX6QDL_CLK_USBOH3>; 128 fsl,usbphy = <&usbphynop1>; 129 fsl,usbmisc = <&usbmisc 2>; 130 phy_type = "hsic"; 131 dr_mode = "host"; 132 ahb-burst-config = <0x0>; 133 tx-burst-size-dword = <0x10>; 134 rx-burst-size-dword = <0x10>; 135 pinctrl-names = "idle", "active"; 136 pinctrl-0 = <&pinctrl_usbh2_idle>; 137 pinctrl-1 = <&pinctrl_usbh2_active>; 138 #address-cells = <1>; 139 #size-cells = <0>; 140 141 usbnet: smsc@1 { 142 compatible = "usb424,9730"; 143 reg = <1>; 144 }; 145 }; 146