1Kernel driver powr1220 2====================== 3 4Supported chips: 5 6 * Lattice POWR1220AT8 7 8 Prefix: 'powr1220' 9 10 Addresses scanned: none 11 12 Datasheet: Publicly available at the Lattice website 13 14 http://www.latticesemi.com/ 15 16Author: Scott Kanowitz <scott.kanowitz@gmail.com> 17 18Description 19----------- 20 21This driver supports the Lattice POWR1220AT8 chip. The POWR1220 22includes voltage monitoring for 14 inputs as well as trim settings 23for output voltages and GPIOs. This driver implements the voltage 24monitoring portion of the chip. 25 26Voltages are sampled by a 12-bit ADC with a step size of 2 mV. 27An in-line attenuator allows measurements from 0 to 6 V. The 28attenuator is enabled or disabled depending on the setting of the 29input's max value. The driver will enable the attenuator for any 30value over the low measurement range maximum of 2 V. 31 32The input naming convention is as follows: 33 34============== ======== 35driver name pin name 36============== ======== 37in0 VMON1 38in1 VMON2 39in2 VMON3 40in2 VMON4 41in4 VMON5 42in5 VMON6 43in6 VMON7 44in7 VMON8 45in8 VMON9 46in9 VMON10 47in10 VMON11 48in11 VMON12 49in12 VCCA 50in13 VCCINP 51============== ======== 52 53The ADC readings are updated on request with a minimum period of 1s. 54