1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * armadillo5x0.c
4 *
5 * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
6 * updates in http://alberdroid.blogspot.com/
7 *
8 * Based on Atmark Techno, Inc. armadillo 500 BSP 2008
9 * Based on mx31ads.c and pcm037.c Great Work!
10 */
11
12 #include <linux/types.h>
13 #include <linux/init.h>
14 #include <linux/clk.h>
15 #include <linux/platform_device.h>
16 #include <linux/gpio.h>
17 #include <linux/smsc911x.h>
18 #include <linux/interrupt.h>
19 #include <linux/irq.h>
20 #include <linux/mtd/physmap.h>
21 #include <linux/io.h>
22 #include <linux/input.h>
23 #include <linux/i2c.h>
24 #include <linux/usb/otg.h>
25 #include <linux/usb/ulpi.h>
26 #include <linux/delay.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/fixed.h>
29
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 #include <asm/mach/time.h>
33 #include <asm/memory.h>
34 #include <asm/mach/map.h>
35
36 #include "common.h"
37 #include "devices-imx31.h"
38 #include "crmregs-imx3.h"
39 #include "ehci.h"
40 #include "hardware.h"
41 #include "iomux-mx3.h"
42 #include "ulpi.h"
43
44 static int armadillo5x0_pins[] = {
45 /* UART1 */
46 MX31_PIN_CTS1__CTS1,
47 MX31_PIN_RTS1__RTS1,
48 MX31_PIN_TXD1__TXD1,
49 MX31_PIN_RXD1__RXD1,
50 /* UART2 */
51 MX31_PIN_CTS2__CTS2,
52 MX31_PIN_RTS2__RTS2,
53 MX31_PIN_TXD2__TXD2,
54 MX31_PIN_RXD2__RXD2,
55 /* LAN9118_IRQ */
56 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
57 /* SDHC1 */
58 MX31_PIN_SD1_DATA3__SD1_DATA3,
59 MX31_PIN_SD1_DATA2__SD1_DATA2,
60 MX31_PIN_SD1_DATA1__SD1_DATA1,
61 MX31_PIN_SD1_DATA0__SD1_DATA0,
62 MX31_PIN_SD1_CLK__SD1_CLK,
63 MX31_PIN_SD1_CMD__SD1_CMD,
64 /* Framebuffer */
65 MX31_PIN_LD0__LD0,
66 MX31_PIN_LD1__LD1,
67 MX31_PIN_LD2__LD2,
68 MX31_PIN_LD3__LD3,
69 MX31_PIN_LD4__LD4,
70 MX31_PIN_LD5__LD5,
71 MX31_PIN_LD6__LD6,
72 MX31_PIN_LD7__LD7,
73 MX31_PIN_LD8__LD8,
74 MX31_PIN_LD9__LD9,
75 MX31_PIN_LD10__LD10,
76 MX31_PIN_LD11__LD11,
77 MX31_PIN_LD12__LD12,
78 MX31_PIN_LD13__LD13,
79 MX31_PIN_LD14__LD14,
80 MX31_PIN_LD15__LD15,
81 MX31_PIN_LD16__LD16,
82 MX31_PIN_LD17__LD17,
83 MX31_PIN_VSYNC3__VSYNC3,
84 MX31_PIN_HSYNC__HSYNC,
85 MX31_PIN_FPSHIFT__FPSHIFT,
86 MX31_PIN_DRDY0__DRDY0,
87 IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
88 /* I2C2 */
89 MX31_PIN_CSPI2_MOSI__SCL,
90 MX31_PIN_CSPI2_MISO__SDA,
91 /* OTG */
92 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
93 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
94 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
95 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
96 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
97 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
98 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
99 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
100 MX31_PIN_USBOTG_CLK__USBOTG_CLK,
101 MX31_PIN_USBOTG_DIR__USBOTG_DIR,
102 MX31_PIN_USBOTG_NXT__USBOTG_NXT,
103 MX31_PIN_USBOTG_STP__USBOTG_STP,
104 /* USB host 2 */
105 IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
106 IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
107 IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
108 IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
109 IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
110 IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
111 IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
112 IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
113 IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
114 IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
115 IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
116 IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
117 };
118
119 /* USB */
120
121 #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
122 #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
123 #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
124
125 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
126 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
127
usbotg_init(struct platform_device * pdev)128 static int usbotg_init(struct platform_device *pdev)
129 {
130 int err;
131
132 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
133 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
134 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
135 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
136 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
137 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
138 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
139 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
140 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
141 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
142 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
143 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
144
145 /* Chip already enabled by hardware */
146 /* OTG phy reset*/
147 err = gpio_request(OTG_RESET, "USB-OTG-RESET");
148 if (err) {
149 pr_err("Failed to request the usb otg reset gpio\n");
150 return err;
151 }
152
153 err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
154 if (err) {
155 pr_err("Failed to reset the usb otg phy\n");
156 goto otg_free_reset;
157 }
158
159 gpio_set_value(OTG_RESET, 0/*LOW*/);
160 mdelay(5);
161 gpio_set_value(OTG_RESET, 1/*HIGH*/);
162 mdelay(10);
163
164 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
165 MXC_EHCI_INTERFACE_DIFF_UNI);
166
167 otg_free_reset:
168 gpio_free(OTG_RESET);
169 return err;
170 }
171
usbh2_init(struct platform_device * pdev)172 static int usbh2_init(struct platform_device *pdev)
173 {
174 int err;
175
176 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
177 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
178 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
179 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
180 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
181 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
182 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
183 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
184 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
185 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
186 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
187 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
188
189 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
190
191
192 /* Enable the chip */
193 err = gpio_request(USBH2_CS, "USB-H2-CS");
194 if (err) {
195 pr_err("Failed to request the usb host 2 CS gpio\n");
196 return err;
197 }
198
199 err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
200 if (err) {
201 pr_err("Failed to drive the usb host 2 CS gpio\n");
202 goto h2_free_cs;
203 }
204
205 /* H2 phy reset*/
206 err = gpio_request(USBH2_RESET, "USB-H2-RESET");
207 if (err) {
208 pr_err("Failed to request the usb host 2 reset gpio\n");
209 goto h2_free_cs;
210 }
211
212 err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
213 if (err) {
214 pr_err("Failed to reset the usb host 2 phy\n");
215 goto h2_free_reset;
216 }
217
218 gpio_set_value(USBH2_RESET, 0/*LOW*/);
219 mdelay(5);
220 gpio_set_value(USBH2_RESET, 1/*HIGH*/);
221 mdelay(10);
222
223 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
224 MXC_EHCI_INTERFACE_DIFF_UNI);
225
226 h2_free_reset:
227 gpio_free(USBH2_RESET);
228 h2_free_cs:
229 gpio_free(USBH2_CS);
230 return err;
231 }
232
233 static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
234 .init = usbotg_init,
235 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
236 };
237
238 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
239 .init = usbh2_init,
240 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
241 };
242
243 /* RTC over I2C*/
244 #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
245
246 static struct i2c_board_info armadillo5x0_i2c_rtc = {
247 I2C_BOARD_INFO("s35390a", 0x30),
248 };
249
250 /* GPIO BUTTONS */
251 static struct gpio_keys_button armadillo5x0_buttons[] = {
252 {
253 .code = KEY_ENTER, /*28*/
254 .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
255 .active_low = 1,
256 .desc = "menu",
257 .wakeup = 1,
258 }, {
259 .code = KEY_BACK, /*158*/
260 .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
261 .active_low = 1,
262 .desc = "back",
263 .wakeup = 1,
264 }
265 };
266
267 static const struct gpio_keys_platform_data
268 armadillo5x0_button_data __initconst = {
269 .buttons = armadillo5x0_buttons,
270 .nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
271 };
272
273 /*
274 * NAND Flash
275 */
276 static const struct mxc_nand_platform_data
277 armadillo5x0_nand_board_info __initconst = {
278 .width = 1,
279 .hw_ecc = 1,
280 };
281
282 /*
283 * MTD NOR Flash
284 */
285 static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
286 {
287 .name = "nor.bootloader",
288 .offset = 0x00000000,
289 .size = 4*32*1024,
290 }, {
291 .name = "nor.kernel",
292 .offset = MTDPART_OFS_APPEND,
293 .size = 16*128*1024,
294 }, {
295 .name = "nor.userland",
296 .offset = MTDPART_OFS_APPEND,
297 .size = 110*128*1024,
298 }, {
299 .name = "nor.config",
300 .offset = MTDPART_OFS_APPEND,
301 .size = 1*128*1024,
302 },
303 };
304
305 static const struct physmap_flash_data
306 armadillo5x0_nor_flash_pdata __initconst = {
307 .width = 2,
308 .parts = armadillo5x0_nor_flash_partitions,
309 .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
310 };
311
312 static const struct resource armadillo5x0_nor_flash_resource __initconst = {
313 .flags = IORESOURCE_MEM,
314 .start = MX31_CS0_BASE_ADDR,
315 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
316 };
317
318 /*
319 * FB support
320 */
321 static const struct fb_videomode fb_modedb[] = {
322 { /* 640x480 @ 60 Hz */
323 .name = "CRT-VGA",
324 .refresh = 60,
325 .xres = 640,
326 .yres = 480,
327 .pixclock = 39721,
328 .left_margin = 35,
329 .right_margin = 115,
330 .upper_margin = 43,
331 .lower_margin = 1,
332 .hsync_len = 10,
333 .vsync_len = 1,
334 .sync = FB_SYNC_OE_ACT_HIGH,
335 .vmode = FB_VMODE_NONINTERLACED,
336 .flag = 0,
337 }, {/* 800x600 @ 56 Hz */
338 .name = "CRT-SVGA",
339 .refresh = 56,
340 .xres = 800,
341 .yres = 600,
342 .pixclock = 30000,
343 .left_margin = 30,
344 .right_margin = 108,
345 .upper_margin = 13,
346 .lower_margin = 10,
347 .hsync_len = 10,
348 .vsync_len = 1,
349 .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
350 FB_SYNC_VERT_HIGH_ACT,
351 .vmode = FB_VMODE_NONINTERLACED,
352 .flag = 0,
353 },
354 };
355
356 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
357 .name = "CRT-VGA",
358 .mode = fb_modedb,
359 .num_modes = ARRAY_SIZE(fb_modedb),
360 };
361
362 /*
363 * SDHC 1
364 * MMC support
365 */
armadillo5x0_sdhc1_get_ro(struct device * dev)366 static int armadillo5x0_sdhc1_get_ro(struct device *dev)
367 {
368 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
369 }
370
armadillo5x0_sdhc1_init(struct device * dev,irq_handler_t detect_irq,void * data)371 static int armadillo5x0_sdhc1_init(struct device *dev,
372 irq_handler_t detect_irq, void *data)
373 {
374 int ret;
375 int gpio_det, gpio_wp;
376
377 gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
378 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
379
380 ret = gpio_request(gpio_det, "sdhc-card-detect");
381 if (ret)
382 return ret;
383
384 gpio_direction_input(gpio_det);
385
386 ret = gpio_request(gpio_wp, "sdhc-write-protect");
387 if (ret)
388 goto err_gpio_free;
389
390 gpio_direction_input(gpio_wp);
391
392 /* When supported the trigger type have to be BOTH */
393 ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
394 detect_irq, IRQF_TRIGGER_FALLING,
395 "sdhc-detect", data);
396
397 if (ret)
398 goto err_gpio_free_2;
399
400 return 0;
401
402 err_gpio_free_2:
403 gpio_free(gpio_wp);
404
405 err_gpio_free:
406 gpio_free(gpio_det);
407
408 return ret;
409
410 }
411
armadillo5x0_sdhc1_exit(struct device * dev,void * data)412 static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
413 {
414 free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
415 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
416 gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
417 }
418
419 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
420 .get_ro = armadillo5x0_sdhc1_get_ro,
421 .init = armadillo5x0_sdhc1_init,
422 .exit = armadillo5x0_sdhc1_exit,
423 };
424
425 /*
426 * SMSC 9118
427 * Network support
428 */
429 static struct resource armadillo5x0_smc911x_resources[] = {
430 {
431 .start = MX31_CS3_BASE_ADDR,
432 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
433 .flags = IORESOURCE_MEM,
434 }, {
435 /* irq number is run-time assigned */
436 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
437 },
438 };
439
440 static struct smsc911x_platform_config smsc911x_info = {
441 .flags = SMSC911X_USE_16BIT,
442 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
443 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
444 };
445
446 static struct platform_device armadillo5x0_smc911x_device = {
447 .name = "smsc911x",
448 .id = -1,
449 .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
450 .resource = armadillo5x0_smc911x_resources,
451 .dev = {
452 .platform_data = &smsc911x_info,
453 },
454 };
455
456 /* UART device data */
457 static const struct imxuart_platform_data uart_pdata __initconst = {
458 .flags = IMXUART_HAVE_RTSCTS,
459 };
460
461 static struct platform_device *devices[] __initdata = {
462 &armadillo5x0_smc911x_device,
463 };
464
465 static struct regulator_consumer_supply dummy_supplies[] = {
466 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
467 REGULATOR_SUPPLY("vddvario", "smsc911x"),
468 };
469
470 /*
471 * Perform board specific initializations
472 */
armadillo5x0_init(void)473 static void __init armadillo5x0_init(void)
474 {
475 imx31_soc_init();
476
477 mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
478 ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
479
480 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
481
482 imx31_add_imx_i2c1(NULL);
483
484 /* Register UART */
485 imx31_add_imx_uart0(&uart_pdata);
486 imx31_add_imx_uart1(&uart_pdata);
487
488 /* Register FB */
489 imx31_add_ipu_core();
490 imx31_add_mx3_sdc_fb(&mx3fb_pdata);
491
492 /* Register NOR Flash */
493 platform_device_register_resndata(NULL, "physmap-flash", -1,
494 &armadillo5x0_nor_flash_resource, 1,
495 &armadillo5x0_nor_flash_pdata,
496 sizeof(armadillo5x0_nor_flash_pdata));
497
498 /* Register NAND Flash */
499 imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
500
501 /* set NAND page size to 2k if not configured via boot mode pins */
502 imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) | (1 << 30),
503 mx3_ccm_base + MXC_CCM_RCSR);
504 }
505
armadillo5x0_late(void)506 static void __init armadillo5x0_late(void)
507 {
508 armadillo5x0_smc911x_resources[1].start =
509 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
510 armadillo5x0_smc911x_resources[1].end =
511 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
512 platform_add_devices(devices, ARRAY_SIZE(devices));
513
514 imx_add_gpio_keys(&armadillo5x0_button_data);
515
516 /* SMSC9118 IRQ pin */
517 gpio_direction_input(MX31_PIN_GPIO1_0);
518
519 /* Register SDHC */
520 imx31_add_mxc_mmc(0, &sdhc_pdata);
521
522 /* RTC */
523 /* Get RTC IRQ and register the chip */
524 if (!gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc")) {
525 if (!gpio_direction_input(ARMADILLO5X0_RTC_GPIO))
526 armadillo5x0_i2c_rtc.irq =
527 gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
528 else
529 gpio_free(ARMADILLO5X0_RTC_GPIO);
530 }
531
532 if (armadillo5x0_i2c_rtc.irq == 0)
533 pr_warn("armadillo5x0_init: failed to get RTC IRQ\n");
534 i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
535
536 /* USB */
537 usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
538 ULPI_OTG_DRVVBUS_EXT);
539 if (usbotg_pdata.otg)
540 imx31_add_mxc_ehci_otg(&usbotg_pdata);
541 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
542 ULPI_OTG_DRVVBUS_EXT);
543 if (usbh2_pdata.otg)
544 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
545 }
546
armadillo5x0_timer_init(void)547 static void __init armadillo5x0_timer_init(void)
548 {
549 mx31_clocks_init(26000000);
550 }
551
552 MACHINE_START(ARMADILLO5X0, "Armadillo-500")
553 /* Maintainer: Alberto Panizzo */
554 .atag_offset = 0x100,
555 .map_io = mx31_map_io,
556 .init_early = imx31_init_early,
557 .init_irq = mx31_init_irq,
558 .init_time = armadillo5x0_timer_init,
559 .init_machine = armadillo5x0_init,
560 .init_late = armadillo5x0_late,
561 .restart = mxc_restart,
562 MACHINE_END
563