1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Based on arch/arm/kernel/sys_arm.c
4 *
5 * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
6 * Copyright (C) 1995, 1996 Russell King.
7 * Copyright (C) 2012 ARM Ltd.
8 */
9
10 #include <linux/compat.h>
11 #include <linux/personality.h>
12 #include <linux/sched.h>
13 #include <linux/sched/signal.h>
14 #include <linux/slab.h>
15 #include <linux/syscalls.h>
16 #include <linux/uaccess.h>
17
18 #include <asm/cacheflush.h>
19 #include <asm/system_misc.h>
20 #include <asm/unistd.h>
21
22 static long
__do_compat_cache_op(unsigned long start,unsigned long end)23 __do_compat_cache_op(unsigned long start, unsigned long end)
24 {
25 long ret;
26
27 do {
28 unsigned long chunk = min(PAGE_SIZE, end - start);
29
30 if (fatal_signal_pending(current))
31 return 0;
32
33 ret = __flush_cache_user_range(start, start + chunk);
34 if (ret)
35 return ret;
36
37 cond_resched();
38 start += chunk;
39 } while (start < end);
40
41 return 0;
42 }
43
44 static inline long
do_compat_cache_op(unsigned long start,unsigned long end,int flags)45 do_compat_cache_op(unsigned long start, unsigned long end, int flags)
46 {
47 if (end < start || flags)
48 return -EINVAL;
49
50 if (!access_ok((const void __user *)start, end - start))
51 return -EFAULT;
52
53 return __do_compat_cache_op(start, end);
54 }
55 /*
56 * Handle all unrecognised system calls.
57 */
compat_arm_syscall(struct pt_regs * regs,int scno)58 long compat_arm_syscall(struct pt_regs *regs, int scno)
59 {
60 void __user *addr;
61
62 switch (scno) {
63 /*
64 * Flush a region from virtual address 'r0' to virtual address 'r1'
65 * _exclusive_. There is no alignment requirement on either address;
66 * user space does not need to know the hardware cache layout.
67 *
68 * r2 contains flags. It should ALWAYS be passed as ZERO until it
69 * is defined to be something else. For now we ignore it, but may
70 * the fires of hell burn in your belly if you break this rule. ;)
71 *
72 * (at a later date, we may want to allow this call to not flush
73 * various aspects of the cache. Passing '0' will guarantee that
74 * everything necessary gets flushed to maintain consistency in
75 * the specified region).
76 */
77 case __ARM_NR_compat_cacheflush:
78 return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
79
80 case __ARM_NR_compat_set_tls:
81 current->thread.uw.tp_value = regs->regs[0];
82
83 /*
84 * Protect against register corruption from context switch.
85 * See comment in tls_thread_flush.
86 */
87 barrier();
88 write_sysreg(regs->regs[0], tpidrro_el0);
89 return 0;
90
91 default:
92 /*
93 * Calls 0xf0xxx..0xf07ff are defined to return -ENOSYS
94 * if not implemented, rather than raising SIGILL. This
95 * way the calling program can gracefully determine whether
96 * a feature is supported.
97 */
98 if (scno < __ARM_NR_COMPAT_END)
99 return -ENOSYS;
100 break;
101 }
102
103 addr = (void __user *)instruction_pointer(regs) -
104 (compat_thumb_mode(regs) ? 2 : 4);
105
106 arm64_notify_die("Oops - bad compat syscall(2)", regs,
107 SIGILL, ILL_ILLTRP, addr, scno);
108 return 0;
109 }
110