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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * linux/arch/unicore32/kernel/process.c
4  *
5  * Code specific to PKUnity SoC and UniCore ISA
6  *
7  * Copyright (C) 2001-2010 GUAN Xue-tao
8  */
9 #include <stdarg.h>
10 
11 #include <linux/module.h>
12 #include <linux/sched.h>
13 #include <linux/sched/debug.h>
14 #include <linux/sched/task.h>
15 #include <linux/sched/task_stack.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/stddef.h>
19 #include <linux/unistd.h>
20 #include <linux/delay.h>
21 #include <linux/reboot.h>
22 #include <linux/interrupt.h>
23 #include <linux/init.h>
24 #include <linux/cpu.h>
25 #include <linux/elfcore.h>
26 #include <linux/pm.h>
27 #include <linux/tick.h>
28 #include <linux/utsname.h>
29 #include <linux/uaccess.h>
30 #include <linux/random.h>
31 #include <linux/gpio.h>
32 #include <linux/stacktrace.h>
33 
34 #include <asm/cacheflush.h>
35 #include <asm/processor.h>
36 #include <asm/stacktrace.h>
37 
38 #include "setup.h"
39 
40 static const char * const processor_modes[] = {
41 	"UK00", "UK01", "UK02", "UK03", "UK04", "UK05", "UK06", "UK07",
42 	"UK08", "UK09", "UK0A", "UK0B", "UK0C", "UK0D", "UK0E", "UK0F",
43 	"USER", "REAL", "INTR", "PRIV", "UK14", "UK15", "UK16", "ABRT",
44 	"UK18", "UK19", "UK1A", "EXTN", "UK1C", "UK1D", "UK1E", "SUSR"
45 };
46 
arch_cpu_idle(void)47 void arch_cpu_idle(void)
48 {
49 	cpu_do_idle();
50 	local_irq_enable();
51 }
52 
machine_halt(void)53 void machine_halt(void)
54 {
55 	gpio_set_value(GPO_SOFT_OFF, 0);
56 }
57 
58 /*
59  * Function pointers to optional machine specific functions
60  */
61 void (*pm_power_off)(void) = NULL;
62 EXPORT_SYMBOL(pm_power_off);
63 
machine_power_off(void)64 void machine_power_off(void)
65 {
66 	if (pm_power_off)
67 		pm_power_off();
68 	machine_halt();
69 }
70 
machine_restart(char * cmd)71 void machine_restart(char *cmd)
72 {
73 	/* Disable interrupts first */
74 	local_irq_disable();
75 
76 	/*
77 	 * Tell the mm system that we are going to reboot -
78 	 * we may need it to insert some 1:1 mappings so that
79 	 * soft boot works.
80 	 */
81 	setup_mm_for_reboot();
82 
83 	/* Clean and invalidate caches */
84 	flush_cache_all();
85 
86 	/* Turn off caching */
87 	cpu_proc_fin();
88 
89 	/* Push out any further dirty data, and ensure cache is empty */
90 	flush_cache_all();
91 
92 	/*
93 	 * Now handle reboot code.
94 	 */
95 	if (reboot_mode == REBOOT_SOFT) {
96 		/* Jump into ROM at address 0xffff0000 */
97 		cpu_reset(VECTORS_BASE);
98 	} else {
99 		writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */
100 		writel(0x00100800, PM_PLLDDRCFG); /* ddr clk =  44M */
101 		writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */
102 
103 		/* Use on-chip reset capability */
104 		/* following instructions must be in one icache line */
105 		__asm__ __volatile__(
106 			"	.align 5\n\t"
107 			"	stw	%1, [%0]\n\t"
108 			"201:	ldw	r0, [%0]\n\t"
109 			"	cmpsub.a	r0, #0\n\t"
110 			"	bne	201b\n\t"
111 			"	stw	%3, [%2]\n\t"
112 			"	nop; nop; nop\n\t"
113 			/* prefetch 3 instructions at most */
114 			:
115 			: "r" (PM_PMCR),
116 			  "r" (PM_PMCR_CFBSYS | PM_PMCR_CFBDDR
117 				| PM_PMCR_CFBVGA),
118 			  "r" (RESETC_SWRR),
119 			  "r" (RESETC_SWRR_SRB)
120 			: "r0", "memory");
121 	}
122 
123 	/*
124 	 * Whoops - the architecture was unable to reboot.
125 	 * Tell the user!
126 	 */
127 	mdelay(1000);
128 	printk(KERN_EMERG "Reboot failed -- System halted\n");
129 	do { } while (1);
130 }
131 
__show_regs(struct pt_regs * regs)132 void __show_regs(struct pt_regs *regs)
133 {
134 	unsigned long flags;
135 	char buf[64];
136 
137 	show_regs_print_info(KERN_DEFAULT);
138 	printk("PC is at %pS\n", (void *)instruction_pointer(regs));
139 	printk("LR is at %pS\n", (void *)regs->UCreg_lr);
140 	printk(KERN_DEFAULT "pc : [<%08lx>]    lr : [<%08lx>]    psr: %08lx\n"
141 	       "sp : %08lx  ip : %08lx  fp : %08lx\n",
142 		regs->UCreg_pc, regs->UCreg_lr, regs->UCreg_asr,
143 		regs->UCreg_sp, regs->UCreg_ip, regs->UCreg_fp);
144 	printk(KERN_DEFAULT "r26: %08lx  r25: %08lx  r24: %08lx\n",
145 		regs->UCreg_26, regs->UCreg_25,
146 		regs->UCreg_24);
147 	printk(KERN_DEFAULT "r23: %08lx  r22: %08lx  r21: %08lx  r20: %08lx\n",
148 		regs->UCreg_23, regs->UCreg_22,
149 		regs->UCreg_21, regs->UCreg_20);
150 	printk(KERN_DEFAULT "r19: %08lx  r18: %08lx  r17: %08lx  r16: %08lx\n",
151 		regs->UCreg_19, regs->UCreg_18,
152 		regs->UCreg_17, regs->UCreg_16);
153 	printk(KERN_DEFAULT "r15: %08lx  r14: %08lx  r13: %08lx  r12: %08lx\n",
154 		regs->UCreg_15, regs->UCreg_14,
155 		regs->UCreg_13, regs->UCreg_12);
156 	printk(KERN_DEFAULT "r11: %08lx  r10: %08lx  r9 : %08lx  r8 : %08lx\n",
157 		regs->UCreg_11, regs->UCreg_10,
158 		regs->UCreg_09, regs->UCreg_08);
159 	printk(KERN_DEFAULT "r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
160 		regs->UCreg_07, regs->UCreg_06,
161 		regs->UCreg_05, regs->UCreg_04);
162 	printk(KERN_DEFAULT "r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
163 		regs->UCreg_03, regs->UCreg_02,
164 		regs->UCreg_01, regs->UCreg_00);
165 
166 	flags = regs->UCreg_asr;
167 	buf[0] = flags & PSR_S_BIT ? 'S' : 's';
168 	buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
169 	buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
170 	buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
171 	buf[4] = '\0';
172 
173 	printk(KERN_DEFAULT "Flags: %s  INTR o%s  REAL o%s  Mode %s  Segment %s\n",
174 		buf, interrupts_enabled(regs) ? "n" : "ff",
175 		fast_interrupts_enabled(regs) ? "n" : "ff",
176 		processor_modes[processor_mode(regs)],
177 		uaccess_kernel() ? "kernel" : "user");
178 	{
179 		unsigned int ctrl;
180 
181 		buf[0] = '\0';
182 		{
183 			unsigned int transbase;
184 			asm("movc %0, p0.c2, #0\n"
185 			    : "=r" (transbase));
186 			snprintf(buf, sizeof(buf), "  Table: %08x", transbase);
187 		}
188 		asm("movc %0, p0.c1, #0\n" : "=r" (ctrl));
189 
190 		printk(KERN_DEFAULT "Control: %08x%s\n", ctrl, buf);
191 	}
192 }
193 
show_regs(struct pt_regs * regs)194 void show_regs(struct pt_regs *regs)
195 {
196 	printk(KERN_DEFAULT "\n");
197 	printk(KERN_DEFAULT "Pid: %d, comm: %20s\n",
198 			task_pid_nr(current), current->comm);
199 	__show_regs(regs);
200 	__backtrace();
201 }
202 
flush_thread(void)203 void flush_thread(void)
204 {
205 	struct thread_info *thread = current_thread_info();
206 	struct task_struct *tsk = current;
207 
208 	memset(thread->used_cp, 0, sizeof(thread->used_cp));
209 	memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
210 #ifdef CONFIG_UNICORE_FPU_F64
211 	memset(&thread->fpstate, 0, sizeof(struct fp_state));
212 #endif
213 }
214 
release_thread(struct task_struct * dead_task)215 void release_thread(struct task_struct *dead_task)
216 {
217 }
218 
219 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
220 asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
221 
222 int
copy_thread(unsigned long clone_flags,unsigned long stack_start,unsigned long stk_sz,struct task_struct * p)223 copy_thread(unsigned long clone_flags, unsigned long stack_start,
224 	    unsigned long stk_sz, struct task_struct *p)
225 {
226 	struct thread_info *thread = task_thread_info(p);
227 	struct pt_regs *childregs = task_pt_regs(p);
228 
229 	memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
230 	thread->cpu_context.sp = (unsigned long)childregs;
231 	if (unlikely(p->flags & PF_KTHREAD)) {
232 		thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
233 		thread->cpu_context.r4 = stack_start;
234 		thread->cpu_context.r5 = stk_sz;
235 		memset(childregs, 0, sizeof(struct pt_regs));
236 	} else {
237 		thread->cpu_context.pc = (unsigned long)ret_from_fork;
238 		*childregs = *current_pt_regs();
239 		childregs->UCreg_00 = 0;
240 		if (stack_start)
241 			childregs->UCreg_sp = stack_start;
242 
243 		if (clone_flags & CLONE_SETTLS)
244 			childregs->UCreg_16 = childregs->UCreg_03;
245 	}
246 	return 0;
247 }
248 
249 /*
250  * Fill in the task's elfregs structure for a core dump.
251  */
dump_task_regs(struct task_struct * t,elf_gregset_t * elfregs)252 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
253 {
254 	elf_core_copy_regs(elfregs, task_pt_regs(t));
255 	return 1;
256 }
257 
258 /*
259  * fill in the fpe structure for a core dump...
260  */
dump_fpu(struct pt_regs * regs,elf_fpregset_t * fp)261 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
262 {
263 	struct thread_info *thread = current_thread_info();
264 	int used_math = thread->used_cp[1] | thread->used_cp[2];
265 
266 #ifdef CONFIG_UNICORE_FPU_F64
267 	if (used_math)
268 		memcpy(fp, &thread->fpstate, sizeof(*fp));
269 #endif
270 	return used_math != 0;
271 }
272 EXPORT_SYMBOL(dump_fpu);
273 
get_wchan(struct task_struct * p)274 unsigned long get_wchan(struct task_struct *p)
275 {
276 	struct stackframe frame;
277 	int count = 0;
278 	if (!p || p == current || p->state == TASK_RUNNING)
279 		return 0;
280 
281 	frame.fp = thread_saved_fp(p);
282 	frame.sp = thread_saved_sp(p);
283 	frame.lr = 0;			/* recovered from the stack */
284 	frame.pc = thread_saved_pc(p);
285 	do {
286 		int ret = unwind_frame(&frame);
287 		if (ret < 0)
288 			return 0;
289 		if (!in_sched_functions(frame.pc))
290 			return frame.pc;
291 	} while ((count++) < 16);
292 	return 0;
293 }
294 
arch_randomize_brk(struct mm_struct * mm)295 unsigned long arch_randomize_brk(struct mm_struct *mm)
296 {
297 	return randomize_page(mm->brk, 0x02000000);
298 }
299 
300 /*
301  * The vectors page is always readable from user space for the
302  * atomic helpers and the signal restart code.  Let's declare a mapping
303  * for it so it is visible through ptrace and /proc/<pid>/mem.
304  */
305 
vectors_user_mapping(void)306 int vectors_user_mapping(void)
307 {
308 	struct mm_struct *mm = current->mm;
309 	return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
310 				       VM_READ | VM_EXEC |
311 				       VM_MAYREAD | VM_MAYEXEC |
312 				       VM_DONTEXPAND | VM_DONTDUMP,
313 				       NULL);
314 }
315 
arch_vma_name(struct vm_area_struct * vma)316 const char *arch_vma_name(struct vm_area_struct *vma)
317 {
318 	return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
319 }
320