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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright 2011-2012 Calxeda, Inc.
4  */
5 #include <linux/types.h>
6 #include <linux/kernel.h>
7 #include <linux/ctype.h>
8 #include <linux/edac.h>
9 #include <linux/interrupt.h>
10 #include <linux/platform_device.h>
11 #include <linux/of_platform.h>
12 
13 #include "edac_module.h"
14 
15 #define SR_CLR_SB_ECC_INTR	0x0
16 #define SR_CLR_DB_ECC_INTR	0x4
17 
18 struct hb_l2_drvdata {
19 	void __iomem *base;
20 	int sb_irq;
21 	int db_irq;
22 };
23 
highbank_l2_err_handler(int irq,void * dev_id)24 static irqreturn_t highbank_l2_err_handler(int irq, void *dev_id)
25 {
26 	struct edac_device_ctl_info *dci = dev_id;
27 	struct hb_l2_drvdata *drvdata = dci->pvt_info;
28 
29 	if (irq == drvdata->sb_irq) {
30 		writel(1, drvdata->base + SR_CLR_SB_ECC_INTR);
31 		edac_device_handle_ce(dci, 0, 0, dci->ctl_name);
32 	}
33 	if (irq == drvdata->db_irq) {
34 		writel(1, drvdata->base + SR_CLR_DB_ECC_INTR);
35 		edac_device_handle_ue(dci, 0, 0, dci->ctl_name);
36 	}
37 
38 	return IRQ_HANDLED;
39 }
40 
41 static const struct of_device_id hb_l2_err_of_match[] = {
42 	{ .compatible = "calxeda,hb-sregs-l2-ecc", },
43 	{},
44 };
45 MODULE_DEVICE_TABLE(of, hb_l2_err_of_match);
46 
highbank_l2_err_probe(struct platform_device * pdev)47 static int highbank_l2_err_probe(struct platform_device *pdev)
48 {
49 	const struct of_device_id *id;
50 	struct edac_device_ctl_info *dci;
51 	struct hb_l2_drvdata *drvdata;
52 	struct resource *r;
53 	int res = 0;
54 
55 	dci = edac_device_alloc_ctl_info(sizeof(*drvdata), "cpu",
56 		1, "L", 1, 2, NULL, 0, 0);
57 	if (!dci)
58 		return -ENOMEM;
59 
60 	drvdata = dci->pvt_info;
61 	dci->dev = &pdev->dev;
62 	platform_set_drvdata(pdev, dci);
63 
64 	if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
65 		return -ENOMEM;
66 
67 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
68 	if (!r) {
69 		dev_err(&pdev->dev, "Unable to get mem resource\n");
70 		res = -ENODEV;
71 		goto err;
72 	}
73 
74 	if (!devm_request_mem_region(&pdev->dev, r->start,
75 				     resource_size(r), dev_name(&pdev->dev))) {
76 		dev_err(&pdev->dev, "Error while requesting mem region\n");
77 		res = -EBUSY;
78 		goto err;
79 	}
80 
81 	drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
82 	if (!drvdata->base) {
83 		dev_err(&pdev->dev, "Unable to map regs\n");
84 		res = -ENOMEM;
85 		goto err;
86 	}
87 
88 	id = of_match_device(hb_l2_err_of_match, &pdev->dev);
89 	dci->mod_name = pdev->dev.driver->name;
90 	dci->ctl_name = id ? id->compatible : "unknown";
91 	dci->dev_name = dev_name(&pdev->dev);
92 
93 	if (edac_device_add_device(dci))
94 		goto err;
95 
96 	drvdata->db_irq = platform_get_irq(pdev, 0);
97 	res = devm_request_irq(&pdev->dev, drvdata->db_irq,
98 			       highbank_l2_err_handler,
99 			       0, dev_name(&pdev->dev), dci);
100 	if (res < 0)
101 		goto err2;
102 
103 	drvdata->sb_irq = platform_get_irq(pdev, 1);
104 	res = devm_request_irq(&pdev->dev, drvdata->sb_irq,
105 			       highbank_l2_err_handler,
106 			       0, dev_name(&pdev->dev), dci);
107 	if (res < 0)
108 		goto err2;
109 
110 	devres_close_group(&pdev->dev, NULL);
111 	return 0;
112 err2:
113 	edac_device_del_device(&pdev->dev);
114 err:
115 	devres_release_group(&pdev->dev, NULL);
116 	edac_device_free_ctl_info(dci);
117 	return res;
118 }
119 
highbank_l2_err_remove(struct platform_device * pdev)120 static int highbank_l2_err_remove(struct platform_device *pdev)
121 {
122 	struct edac_device_ctl_info *dci = platform_get_drvdata(pdev);
123 
124 	edac_device_del_device(&pdev->dev);
125 	edac_device_free_ctl_info(dci);
126 	return 0;
127 }
128 
129 static struct platform_driver highbank_l2_edac_driver = {
130 	.probe = highbank_l2_err_probe,
131 	.remove = highbank_l2_err_remove,
132 	.driver = {
133 		.name = "hb_l2_edac",
134 		.of_match_table = hb_l2_err_of_match,
135 	},
136 };
137 
138 module_platform_driver(highbank_l2_edac_driver);
139 
140 MODULE_LICENSE("GPL v2");
141 MODULE_AUTHOR("Calxeda, Inc.");
142 MODULE_DESCRIPTION("EDAC Driver for Calxeda Highbank L2 Cache");
143