1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * gpio-max3191x.c - GPIO driver for Maxim MAX3191x industrial serializer
4 *
5 * Copyright (C) 2017 KUNBUS GmbH
6 *
7 * The MAX3191x makes 8 digital 24V inputs available via SPI.
8 * Multiple chips can be daisy-chained, the spec does not impose
9 * a limit on the number of chips and neither does this driver.
10 *
11 * Either of two modes is selectable: In 8-bit mode, only the state
12 * of the inputs is clocked out to achieve high readout speeds;
13 * In 16-bit mode, an additional status byte is clocked out with
14 * a CRC and indicator bits for undervoltage and overtemperature.
15 * The driver returns an error instead of potentially bogus data
16 * if any of these fault conditions occur. However it does allow
17 * readout of non-faulting chips in the same daisy-chain.
18 *
19 * MAX3191x supports four debounce settings and the driver is
20 * capable of configuring these differently for each chip in the
21 * daisy-chain.
22 *
23 * If the chips are hardwired to 8-bit mode ("modesel" pulled high),
24 * gpio-pisosr.c can be used alternatively to this driver.
25 *
26 * https://datasheets.maximintegrated.com/en/ds/MAX31910.pdf
27 * https://datasheets.maximintegrated.com/en/ds/MAX31911.pdf
28 * https://datasheets.maximintegrated.com/en/ds/MAX31912.pdf
29 * https://datasheets.maximintegrated.com/en/ds/MAX31913.pdf
30 * https://datasheets.maximintegrated.com/en/ds/MAX31953-MAX31963.pdf
31 */
32
33 #include <linux/bitmap.h>
34 #include <linux/crc8.h>
35 #include <linux/gpio/consumer.h>
36 #include <linux/gpio/driver.h>
37 #include <linux/module.h>
38 #include <linux/spi/spi.h>
39
40 enum max3191x_mode {
41 STATUS_BYTE_ENABLED,
42 STATUS_BYTE_DISABLED,
43 };
44
45 /**
46 * struct max3191x_chip - max3191x daisy-chain
47 * @gpio: GPIO controller struct
48 * @lock: protects read sequences
49 * @nchips: number of chips in the daisy-chain
50 * @mode: current mode, 0 for 16-bit, 1 for 8-bit;
51 * for simplicity, all chips in the daisy-chain are assumed
52 * to use the same mode
53 * @modesel_pins: GPIO pins to configure modesel of each chip
54 * @fault_pins: GPIO pins to detect fault of each chip
55 * @db0_pins: GPIO pins to configure debounce of each chip
56 * @db1_pins: GPIO pins to configure debounce of each chip
57 * @mesg: SPI message to perform a readout
58 * @xfer: SPI transfer used by @mesg
59 * @crc_error: bitmap signaling CRC error for each chip
60 * @overtemp: bitmap signaling overtemperature alarm for each chip
61 * @undervolt1: bitmap signaling undervoltage alarm for each chip
62 * @undervolt2: bitmap signaling undervoltage warning for each chip
63 * @fault: bitmap signaling assertion of @fault_pins for each chip
64 * @ignore_uv: whether to ignore undervoltage alarms;
65 * set by a device property if the chips are powered through
66 * 5VOUT instead of VCC24V, in which case they will constantly
67 * signal undervoltage;
68 * for simplicity, all chips in the daisy-chain are assumed
69 * to be powered the same way
70 */
71 struct max3191x_chip {
72 struct gpio_chip gpio;
73 struct mutex lock;
74 u32 nchips;
75 enum max3191x_mode mode;
76 struct gpio_descs *modesel_pins;
77 struct gpio_descs *fault_pins;
78 struct gpio_descs *db0_pins;
79 struct gpio_descs *db1_pins;
80 struct spi_message mesg;
81 struct spi_transfer xfer;
82 unsigned long *crc_error;
83 unsigned long *overtemp;
84 unsigned long *undervolt1;
85 unsigned long *undervolt2;
86 unsigned long *fault;
87 bool ignore_uv;
88 };
89
90 #define MAX3191X_NGPIO 8
91 #define MAX3191X_CRC8_POLYNOMIAL 0xa8 /* (x^5) + x^4 + x^2 + x^0 */
92
93 DECLARE_CRC8_TABLE(max3191x_crc8);
94
max3191x_get_direction(struct gpio_chip * gpio,unsigned int offset)95 static int max3191x_get_direction(struct gpio_chip *gpio, unsigned int offset)
96 {
97 return 1; /* always in */
98 }
99
max3191x_direction_input(struct gpio_chip * gpio,unsigned int offset)100 static int max3191x_direction_input(struct gpio_chip *gpio, unsigned int offset)
101 {
102 return 0;
103 }
104
max3191x_direction_output(struct gpio_chip * gpio,unsigned int offset,int value)105 static int max3191x_direction_output(struct gpio_chip *gpio,
106 unsigned int offset, int value)
107 {
108 return -EINVAL;
109 }
110
max3191x_set(struct gpio_chip * gpio,unsigned int offset,int value)111 static void max3191x_set(struct gpio_chip *gpio, unsigned int offset, int value)
112 { }
113
max3191x_set_multiple(struct gpio_chip * gpio,unsigned long * mask,unsigned long * bits)114 static void max3191x_set_multiple(struct gpio_chip *gpio, unsigned long *mask,
115 unsigned long *bits)
116 { }
117
max3191x_wordlen(struct max3191x_chip * max3191x)118 static unsigned int max3191x_wordlen(struct max3191x_chip *max3191x)
119 {
120 return max3191x->mode == STATUS_BYTE_ENABLED ? 2 : 1;
121 }
122
max3191x_readout_locked(struct max3191x_chip * max3191x)123 static int max3191x_readout_locked(struct max3191x_chip *max3191x)
124 {
125 struct device *dev = max3191x->gpio.parent;
126 struct spi_device *spi = to_spi_device(dev);
127 int val, i, ot = 0, uv1 = 0;
128
129 val = spi_sync(spi, &max3191x->mesg);
130 if (val) {
131 dev_err_ratelimited(dev, "SPI receive error %d\n", val);
132 return val;
133 }
134
135 for (i = 0; i < max3191x->nchips; i++) {
136 if (max3191x->mode == STATUS_BYTE_ENABLED) {
137 u8 in = ((u8 *)max3191x->xfer.rx_buf)[i * 2];
138 u8 status = ((u8 *)max3191x->xfer.rx_buf)[i * 2 + 1];
139
140 val = (status & 0xf8) != crc8(max3191x_crc8, &in, 1, 0);
141 __assign_bit(i, max3191x->crc_error, val);
142 if (val)
143 dev_err_ratelimited(dev,
144 "chip %d: CRC error\n", i);
145
146 ot = (status >> 1) & 1;
147 __assign_bit(i, max3191x->overtemp, ot);
148 if (ot)
149 dev_err_ratelimited(dev,
150 "chip %d: overtemperature\n", i);
151
152 if (!max3191x->ignore_uv) {
153 uv1 = !((status >> 2) & 1);
154 __assign_bit(i, max3191x->undervolt1, uv1);
155 if (uv1)
156 dev_err_ratelimited(dev,
157 "chip %d: undervoltage\n", i);
158
159 val = !(status & 1);
160 __assign_bit(i, max3191x->undervolt2, val);
161 if (val && !uv1)
162 dev_warn_ratelimited(dev,
163 "chip %d: voltage warn\n", i);
164 }
165 }
166
167 if (max3191x->fault_pins && !max3191x->ignore_uv) {
168 /* fault pin shared by all chips or per chip */
169 struct gpio_desc *fault_pin =
170 (max3191x->fault_pins->ndescs == 1)
171 ? max3191x->fault_pins->desc[0]
172 : max3191x->fault_pins->desc[i];
173
174 val = gpiod_get_value_cansleep(fault_pin);
175 if (val < 0) {
176 dev_err_ratelimited(dev,
177 "GPIO read error %d\n", val);
178 return val;
179 }
180 __assign_bit(i, max3191x->fault, val);
181 if (val && !uv1 && !ot)
182 dev_err_ratelimited(dev,
183 "chip %d: fault\n", i);
184 }
185 }
186
187 return 0;
188 }
189
max3191x_chip_is_faulting(struct max3191x_chip * max3191x,unsigned int chipnum)190 static bool max3191x_chip_is_faulting(struct max3191x_chip *max3191x,
191 unsigned int chipnum)
192 {
193 /* without status byte the only diagnostic is the fault pin */
194 if (!max3191x->ignore_uv && test_bit(chipnum, max3191x->fault))
195 return true;
196
197 if (max3191x->mode == STATUS_BYTE_DISABLED)
198 return false;
199
200 return test_bit(chipnum, max3191x->crc_error) ||
201 test_bit(chipnum, max3191x->overtemp) ||
202 (!max3191x->ignore_uv &&
203 test_bit(chipnum, max3191x->undervolt1));
204 }
205
max3191x_get(struct gpio_chip * gpio,unsigned int offset)206 static int max3191x_get(struct gpio_chip *gpio, unsigned int offset)
207 {
208 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
209 int ret, chipnum, wordlen = max3191x_wordlen(max3191x);
210 u8 in;
211
212 mutex_lock(&max3191x->lock);
213 ret = max3191x_readout_locked(max3191x);
214 if (ret)
215 goto out_unlock;
216
217 chipnum = offset / MAX3191X_NGPIO;
218 if (max3191x_chip_is_faulting(max3191x, chipnum)) {
219 ret = -EIO;
220 goto out_unlock;
221 }
222
223 in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
224 ret = (in >> (offset % MAX3191X_NGPIO)) & 1;
225
226 out_unlock:
227 mutex_unlock(&max3191x->lock);
228 return ret;
229 }
230
max3191x_get_multiple(struct gpio_chip * gpio,unsigned long * mask,unsigned long * bits)231 static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask,
232 unsigned long *bits)
233 {
234 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
235 int ret, bit = 0, wordlen = max3191x_wordlen(max3191x);
236
237 mutex_lock(&max3191x->lock);
238 ret = max3191x_readout_locked(max3191x);
239 if (ret)
240 goto out_unlock;
241
242 while ((bit = find_next_bit(mask, gpio->ngpio, bit)) != gpio->ngpio) {
243 unsigned int chipnum = bit / MAX3191X_NGPIO;
244 unsigned long in, shift, index;
245
246 if (max3191x_chip_is_faulting(max3191x, chipnum)) {
247 ret = -EIO;
248 goto out_unlock;
249 }
250
251 in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen];
252 shift = round_down(bit % BITS_PER_LONG, MAX3191X_NGPIO);
253 index = bit / BITS_PER_LONG;
254 bits[index] &= ~(mask[index] & (0xff << shift));
255 bits[index] |= mask[index] & (in << shift); /* copy bits */
256
257 bit = (chipnum + 1) * MAX3191X_NGPIO; /* go to next chip */
258 }
259
260 out_unlock:
261 mutex_unlock(&max3191x->lock);
262 return ret;
263 }
264
max3191x_set_config(struct gpio_chip * gpio,unsigned int offset,unsigned long config)265 static int max3191x_set_config(struct gpio_chip *gpio, unsigned int offset,
266 unsigned long config)
267 {
268 struct max3191x_chip *max3191x = gpiochip_get_data(gpio);
269 u32 debounce, chipnum, db0_val, db1_val;
270
271 if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE)
272 return -ENOTSUPP;
273
274 if (!max3191x->db0_pins || !max3191x->db1_pins)
275 return -EINVAL;
276
277 debounce = pinconf_to_config_argument(config);
278 switch (debounce) {
279 case 0:
280 db0_val = 0;
281 db1_val = 0;
282 break;
283 case 1 ... 25:
284 db0_val = 0;
285 db1_val = 1;
286 break;
287 case 26 ... 750:
288 db0_val = 1;
289 db1_val = 0;
290 break;
291 case 751 ... 3000:
292 db0_val = 1;
293 db1_val = 1;
294 break;
295 default:
296 return -EINVAL;
297 }
298
299 if (max3191x->db0_pins->ndescs == 1)
300 chipnum = 0; /* all chips use the same pair of debounce pins */
301 else
302 chipnum = offset / MAX3191X_NGPIO; /* per chip debounce pins */
303
304 mutex_lock(&max3191x->lock);
305 gpiod_set_value_cansleep(max3191x->db0_pins->desc[chipnum], db0_val);
306 gpiod_set_value_cansleep(max3191x->db1_pins->desc[chipnum], db1_val);
307 mutex_unlock(&max3191x->lock);
308 return 0;
309 }
310
gpiod_set_array_single_value_cansleep(unsigned int ndescs,struct gpio_desc ** desc,struct gpio_array * info,int value)311 static void gpiod_set_array_single_value_cansleep(unsigned int ndescs,
312 struct gpio_desc **desc,
313 struct gpio_array *info,
314 int value)
315 {
316 unsigned long *values;
317
318 values = bitmap_alloc(ndescs, GFP_KERNEL);
319 if (!values)
320 return;
321
322 if (value)
323 bitmap_fill(values, ndescs);
324 else
325 bitmap_zero(values, ndescs);
326
327 gpiod_set_array_value_cansleep(ndescs, desc, info, values);
328 kfree(values);
329 }
330
devm_gpiod_get_array_optional_count(struct device * dev,const char * con_id,enum gpiod_flags flags,unsigned int expected)331 static struct gpio_descs *devm_gpiod_get_array_optional_count(
332 struct device *dev, const char *con_id,
333 enum gpiod_flags flags, unsigned int expected)
334 {
335 struct gpio_descs *descs;
336 int found = gpiod_count(dev, con_id);
337
338 if (found == -ENOENT)
339 return NULL;
340
341 if (found != expected && found != 1) {
342 dev_err(dev, "ignoring %s-gpios: found %d, expected %u or 1\n",
343 con_id, found, expected);
344 return NULL;
345 }
346
347 descs = devm_gpiod_get_array_optional(dev, con_id, flags);
348
349 if (IS_ERR(descs)) {
350 dev_err(dev, "failed to get %s-gpios: %ld\n",
351 con_id, PTR_ERR(descs));
352 return NULL;
353 }
354
355 return descs;
356 }
357
max3191x_probe(struct spi_device * spi)358 static int max3191x_probe(struct spi_device *spi)
359 {
360 struct device *dev = &spi->dev;
361 struct max3191x_chip *max3191x;
362 int n, ret;
363
364 max3191x = devm_kzalloc(dev, sizeof(*max3191x), GFP_KERNEL);
365 if (!max3191x)
366 return -ENOMEM;
367 spi_set_drvdata(spi, max3191x);
368
369 max3191x->nchips = 1;
370 device_property_read_u32(dev, "#daisy-chained-devices",
371 &max3191x->nchips);
372
373 n = BITS_TO_LONGS(max3191x->nchips);
374 max3191x->crc_error = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
375 max3191x->undervolt1 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
376 max3191x->undervolt2 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
377 max3191x->overtemp = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
378 max3191x->fault = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL);
379 max3191x->xfer.rx_buf = devm_kcalloc(dev, max3191x->nchips,
380 2, GFP_KERNEL);
381 if (!max3191x->crc_error || !max3191x->undervolt1 ||
382 !max3191x->overtemp || !max3191x->undervolt2 ||
383 !max3191x->fault || !max3191x->xfer.rx_buf)
384 return -ENOMEM;
385
386 max3191x->modesel_pins = devm_gpiod_get_array_optional_count(dev,
387 "maxim,modesel", GPIOD_ASIS, max3191x->nchips);
388 max3191x->fault_pins = devm_gpiod_get_array_optional_count(dev,
389 "maxim,fault", GPIOD_IN, max3191x->nchips);
390 max3191x->db0_pins = devm_gpiod_get_array_optional_count(dev,
391 "maxim,db0", GPIOD_OUT_LOW, max3191x->nchips);
392 max3191x->db1_pins = devm_gpiod_get_array_optional_count(dev,
393 "maxim,db1", GPIOD_OUT_LOW, max3191x->nchips);
394
395 max3191x->mode = device_property_read_bool(dev, "maxim,modesel-8bit")
396 ? STATUS_BYTE_DISABLED : STATUS_BYTE_ENABLED;
397 if (max3191x->modesel_pins)
398 gpiod_set_array_single_value_cansleep(
399 max3191x->modesel_pins->ndescs,
400 max3191x->modesel_pins->desc,
401 max3191x->modesel_pins->info, max3191x->mode);
402
403 max3191x->ignore_uv = device_property_read_bool(dev,
404 "maxim,ignore-undervoltage");
405
406 if (max3191x->db0_pins && max3191x->db1_pins &&
407 max3191x->db0_pins->ndescs != max3191x->db1_pins->ndescs) {
408 dev_err(dev, "ignoring maxim,db*-gpios: array len mismatch\n");
409 devm_gpiod_put_array(dev, max3191x->db0_pins);
410 devm_gpiod_put_array(dev, max3191x->db1_pins);
411 max3191x->db0_pins = NULL;
412 max3191x->db1_pins = NULL;
413 }
414
415 max3191x->xfer.len = max3191x->nchips * max3191x_wordlen(max3191x);
416 spi_message_init_with_transfers(&max3191x->mesg, &max3191x->xfer, 1);
417
418 max3191x->gpio.label = spi->modalias;
419 max3191x->gpio.owner = THIS_MODULE;
420 max3191x->gpio.parent = dev;
421 max3191x->gpio.base = -1;
422 max3191x->gpio.ngpio = max3191x->nchips * MAX3191X_NGPIO;
423 max3191x->gpio.can_sleep = true;
424
425 max3191x->gpio.get_direction = max3191x_get_direction;
426 max3191x->gpio.direction_input = max3191x_direction_input;
427 max3191x->gpio.direction_output = max3191x_direction_output;
428 max3191x->gpio.set = max3191x_set;
429 max3191x->gpio.set_multiple = max3191x_set_multiple;
430 max3191x->gpio.get = max3191x_get;
431 max3191x->gpio.get_multiple = max3191x_get_multiple;
432 max3191x->gpio.set_config = max3191x_set_config;
433
434 mutex_init(&max3191x->lock);
435
436 ret = gpiochip_add_data(&max3191x->gpio, max3191x);
437 if (ret) {
438 mutex_destroy(&max3191x->lock);
439 return ret;
440 }
441
442 return 0;
443 }
444
max3191x_remove(struct spi_device * spi)445 static int max3191x_remove(struct spi_device *spi)
446 {
447 struct max3191x_chip *max3191x = spi_get_drvdata(spi);
448
449 gpiochip_remove(&max3191x->gpio);
450 mutex_destroy(&max3191x->lock);
451
452 return 0;
453 }
454
max3191x_register_driver(struct spi_driver * sdrv)455 static int __init max3191x_register_driver(struct spi_driver *sdrv)
456 {
457 crc8_populate_msb(max3191x_crc8, MAX3191X_CRC8_POLYNOMIAL);
458 return spi_register_driver(sdrv);
459 }
460
461 #ifdef CONFIG_OF
462 static const struct of_device_id max3191x_of_id[] = {
463 { .compatible = "maxim,max31910" },
464 { .compatible = "maxim,max31911" },
465 { .compatible = "maxim,max31912" },
466 { .compatible = "maxim,max31913" },
467 { .compatible = "maxim,max31953" },
468 { .compatible = "maxim,max31963" },
469 { }
470 };
471 MODULE_DEVICE_TABLE(of, max3191x_of_id);
472 #endif
473
474 static const struct spi_device_id max3191x_spi_id[] = {
475 { "max31910" },
476 { "max31911" },
477 { "max31912" },
478 { "max31913" },
479 { "max31953" },
480 { "max31963" },
481 { }
482 };
483 MODULE_DEVICE_TABLE(spi, max3191x_spi_id);
484
485 static struct spi_driver max3191x_driver = {
486 .driver = {
487 .name = "max3191x",
488 .of_match_table = of_match_ptr(max3191x_of_id),
489 },
490 .probe = max3191x_probe,
491 .remove = max3191x_remove,
492 .id_table = max3191x_spi_id,
493 };
494 module_driver(max3191x_driver, max3191x_register_driver, spi_unregister_driver);
495
496 MODULE_AUTHOR("Lukas Wunner <lukas@wunner.de>");
497 MODULE_DESCRIPTION("GPIO driver for Maxim MAX3191x industrial serializer");
498 MODULE_LICENSE("GPL v2");
499