1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Xilinx gpio driver for xps/axi_gpio IP.
4 *
5 * Copyright 2008 - 2013 Xilinx, Inc.
6 */
7
8 #include <linux/bitops.h>
9 #include <linux/init.h>
10 #include <linux/errno.h>
11 #include <linux/module.h>
12 #include <linux/of_device.h>
13 #include <linux/of_platform.h>
14 #include <linux/io.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/slab.h>
17
18 /* Register Offset Definitions */
19 #define XGPIO_DATA_OFFSET (0x0) /* Data register */
20 #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */
21
22 #define XGPIO_CHANNEL_OFFSET 0x8
23
24 /* Read/Write access to the GPIO registers */
25 #if defined(CONFIG_ARCH_ZYNQ) || defined(CONFIG_X86)
26 # define xgpio_readreg(offset) readl(offset)
27 # define xgpio_writereg(offset, val) writel(val, offset)
28 #else
29 # define xgpio_readreg(offset) __raw_readl(offset)
30 # define xgpio_writereg(offset, val) __raw_writel(val, offset)
31 #endif
32
33 /**
34 * struct xgpio_instance - Stores information about GPIO device
35 * @gc: GPIO chip
36 * @regs: register block
37 * @gpio_width: GPIO width for every channel
38 * @gpio_state: GPIO state shadow register
39 * @gpio_dir: GPIO direction shadow register
40 * @gpio_lock: Lock used for synchronization
41 */
42 struct xgpio_instance {
43 struct gpio_chip gc;
44 void __iomem *regs;
45 unsigned int gpio_width[2];
46 u32 gpio_state[2];
47 u32 gpio_dir[2];
48 spinlock_t gpio_lock[2];
49 };
50
xgpio_index(struct xgpio_instance * chip,int gpio)51 static inline int xgpio_index(struct xgpio_instance *chip, int gpio)
52 {
53 if (gpio >= chip->gpio_width[0])
54 return 1;
55
56 return 0;
57 }
58
xgpio_regoffset(struct xgpio_instance * chip,int gpio)59 static inline int xgpio_regoffset(struct xgpio_instance *chip, int gpio)
60 {
61 if (xgpio_index(chip, gpio))
62 return XGPIO_CHANNEL_OFFSET;
63
64 return 0;
65 }
66
xgpio_offset(struct xgpio_instance * chip,int gpio)67 static inline int xgpio_offset(struct xgpio_instance *chip, int gpio)
68 {
69 if (xgpio_index(chip, gpio))
70 return gpio - chip->gpio_width[0];
71
72 return gpio;
73 }
74
75 /**
76 * xgpio_get - Read the specified signal of the GPIO device.
77 * @gc: Pointer to gpio_chip device structure.
78 * @gpio: GPIO signal number.
79 *
80 * This function reads the specified signal of the GPIO device.
81 *
82 * Return:
83 * 0 if direction of GPIO signals is set as input otherwise it
84 * returns negative error value.
85 */
xgpio_get(struct gpio_chip * gc,unsigned int gpio)86 static int xgpio_get(struct gpio_chip *gc, unsigned int gpio)
87 {
88 struct xgpio_instance *chip = gpiochip_get_data(gc);
89 u32 val;
90
91 val = xgpio_readreg(chip->regs + XGPIO_DATA_OFFSET +
92 xgpio_regoffset(chip, gpio));
93
94 return !!(val & BIT(xgpio_offset(chip, gpio)));
95 }
96
97 /**
98 * xgpio_set - Write the specified signal of the GPIO device.
99 * @gc: Pointer to gpio_chip device structure.
100 * @gpio: GPIO signal number.
101 * @val: Value to be written to specified signal.
102 *
103 * This function writes the specified value in to the specified signal of the
104 * GPIO device.
105 */
xgpio_set(struct gpio_chip * gc,unsigned int gpio,int val)106 static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
107 {
108 unsigned long flags;
109 struct xgpio_instance *chip = gpiochip_get_data(gc);
110 int index = xgpio_index(chip, gpio);
111 int offset = xgpio_offset(chip, gpio);
112
113 spin_lock_irqsave(&chip->gpio_lock[index], flags);
114
115 /* Write to GPIO signal and set its direction to output */
116 if (val)
117 chip->gpio_state[index] |= BIT(offset);
118 else
119 chip->gpio_state[index] &= ~BIT(offset);
120
121 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
122 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
123
124 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
125 }
126
127 /**
128 * xgpio_set_multiple - Write the specified signals of the GPIO device.
129 * @gc: Pointer to gpio_chip device structure.
130 * @mask: Mask of the GPIOS to modify.
131 * @bits: Value to be wrote on each GPIO
132 *
133 * This function writes the specified values into the specified signals of the
134 * GPIO devices.
135 */
xgpio_set_multiple(struct gpio_chip * gc,unsigned long * mask,unsigned long * bits)136 static void xgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
137 unsigned long *bits)
138 {
139 unsigned long flags;
140 struct xgpio_instance *chip = gpiochip_get_data(gc);
141 int index = xgpio_index(chip, 0);
142 int offset, i;
143
144 spin_lock_irqsave(&chip->gpio_lock[index], flags);
145
146 /* Write to GPIO signals */
147 for (i = 0; i < gc->ngpio; i++) {
148 if (*mask == 0)
149 break;
150 if (index != xgpio_index(chip, i)) {
151 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
152 xgpio_regoffset(chip, i),
153 chip->gpio_state[index]);
154 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
155 index = xgpio_index(chip, i);
156 spin_lock_irqsave(&chip->gpio_lock[index], flags);
157 }
158 if (__test_and_clear_bit(i, mask)) {
159 offset = xgpio_offset(chip, i);
160 if (test_bit(i, bits))
161 chip->gpio_state[index] |= BIT(offset);
162 else
163 chip->gpio_state[index] &= ~BIT(offset);
164 }
165 }
166
167 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
168 xgpio_regoffset(chip, i), chip->gpio_state[index]);
169
170 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
171 }
172
173 /**
174 * xgpio_dir_in - Set the direction of the specified GPIO signal as input.
175 * @gc: Pointer to gpio_chip device structure.
176 * @gpio: GPIO signal number.
177 *
178 * Return:
179 * 0 - if direction of GPIO signals is set as input
180 * otherwise it returns negative error value.
181 */
xgpio_dir_in(struct gpio_chip * gc,unsigned int gpio)182 static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
183 {
184 unsigned long flags;
185 struct xgpio_instance *chip = gpiochip_get_data(gc);
186 int index = xgpio_index(chip, gpio);
187 int offset = xgpio_offset(chip, gpio);
188
189 spin_lock_irqsave(&chip->gpio_lock[index], flags);
190
191 /* Set the GPIO bit in shadow register and set direction as input */
192 chip->gpio_dir[index] |= BIT(offset);
193 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
194 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
195
196 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
197
198 return 0;
199 }
200
201 /**
202 * xgpio_dir_out - Set the direction of the specified GPIO signal as output.
203 * @gc: Pointer to gpio_chip device structure.
204 * @gpio: GPIO signal number.
205 * @val: Value to be written to specified signal.
206 *
207 * This function sets the direction of specified GPIO signal as output.
208 *
209 * Return:
210 * If all GPIO signals of GPIO chip is configured as input then it returns
211 * error otherwise it returns 0.
212 */
xgpio_dir_out(struct gpio_chip * gc,unsigned int gpio,int val)213 static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
214 {
215 unsigned long flags;
216 struct xgpio_instance *chip = gpiochip_get_data(gc);
217 int index = xgpio_index(chip, gpio);
218 int offset = xgpio_offset(chip, gpio);
219
220 spin_lock_irqsave(&chip->gpio_lock[index], flags);
221
222 /* Write state of GPIO signal */
223 if (val)
224 chip->gpio_state[index] |= BIT(offset);
225 else
226 chip->gpio_state[index] &= ~BIT(offset);
227 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET +
228 xgpio_regoffset(chip, gpio), chip->gpio_state[index]);
229
230 /* Clear the GPIO bit in shadow register and set direction as output */
231 chip->gpio_dir[index] &= ~BIT(offset);
232 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET +
233 xgpio_regoffset(chip, gpio), chip->gpio_dir[index]);
234
235 spin_unlock_irqrestore(&chip->gpio_lock[index], flags);
236
237 return 0;
238 }
239
240 /**
241 * xgpio_save_regs - Set initial values of GPIO pins
242 * @chip: Pointer to GPIO instance
243 */
xgpio_save_regs(struct xgpio_instance * chip)244 static void xgpio_save_regs(struct xgpio_instance *chip)
245 {
246 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET, chip->gpio_state[0]);
247 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET, chip->gpio_dir[0]);
248
249 if (!chip->gpio_width[1])
250 return;
251
252 xgpio_writereg(chip->regs + XGPIO_DATA_OFFSET + XGPIO_CHANNEL_OFFSET,
253 chip->gpio_state[1]);
254 xgpio_writereg(chip->regs + XGPIO_TRI_OFFSET + XGPIO_CHANNEL_OFFSET,
255 chip->gpio_dir[1]);
256 }
257
258 /**
259 * xgpio_of_probe - Probe method for the GPIO device.
260 * @pdev: pointer to the platform device
261 *
262 * Return:
263 * It returns 0, if the driver is bound to the GPIO device, or
264 * a negative value if there is an error.
265 */
xgpio_probe(struct platform_device * pdev)266 static int xgpio_probe(struct platform_device *pdev)
267 {
268 struct xgpio_instance *chip;
269 int status = 0;
270 struct device_node *np = pdev->dev.of_node;
271 u32 is_dual;
272
273 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
274 if (!chip)
275 return -ENOMEM;
276
277 platform_set_drvdata(pdev, chip);
278
279 /* Update GPIO state shadow register with default value */
280 of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state[0]);
281
282 /* Update GPIO direction shadow register with default value */
283 if (of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir[0]))
284 chip->gpio_dir[0] = 0xFFFFFFFF;
285
286 /*
287 * Check device node and parent device node for device width
288 * and assume default width of 32
289 */
290 if (of_property_read_u32(np, "xlnx,gpio-width", &chip->gpio_width[0]))
291 chip->gpio_width[0] = 32;
292
293 spin_lock_init(&chip->gpio_lock[0]);
294
295 if (of_property_read_u32(np, "xlnx,is-dual", &is_dual))
296 is_dual = 0;
297
298 if (is_dual) {
299 /* Update GPIO state shadow register with default value */
300 of_property_read_u32(np, "xlnx,dout-default-2",
301 &chip->gpio_state[1]);
302
303 /* Update GPIO direction shadow register with default value */
304 if (of_property_read_u32(np, "xlnx,tri-default-2",
305 &chip->gpio_dir[1]))
306 chip->gpio_dir[1] = 0xFFFFFFFF;
307
308 /*
309 * Check device node and parent device node for device width
310 * and assume default width of 32
311 */
312 if (of_property_read_u32(np, "xlnx,gpio2-width",
313 &chip->gpio_width[1]))
314 chip->gpio_width[1] = 32;
315
316 spin_lock_init(&chip->gpio_lock[1]);
317 }
318
319 chip->gc.base = -1;
320 chip->gc.ngpio = chip->gpio_width[0] + chip->gpio_width[1];
321 chip->gc.parent = &pdev->dev;
322 chip->gc.direction_input = xgpio_dir_in;
323 chip->gc.direction_output = xgpio_dir_out;
324 chip->gc.get = xgpio_get;
325 chip->gc.set = xgpio_set;
326 chip->gc.set_multiple = xgpio_set_multiple;
327
328 chip->gc.label = dev_name(&pdev->dev);
329
330 chip->regs = devm_platform_ioremap_resource(pdev, 0);
331 if (IS_ERR(chip->regs)) {
332 dev_err(&pdev->dev, "failed to ioremap memory resource\n");
333 return PTR_ERR(chip->regs);
334 }
335
336 xgpio_save_regs(chip);
337
338 status = devm_gpiochip_add_data(&pdev->dev, &chip->gc, chip);
339 if (status) {
340 dev_err(&pdev->dev, "failed to add GPIO chip\n");
341 return status;
342 }
343
344 return 0;
345 }
346
347 static const struct of_device_id xgpio_of_match[] = {
348 { .compatible = "xlnx,xps-gpio-1.00.a", },
349 { /* end of list */ },
350 };
351
352 MODULE_DEVICE_TABLE(of, xgpio_of_match);
353
354 static struct platform_driver xgpio_plat_driver = {
355 .probe = xgpio_probe,
356 .driver = {
357 .name = "gpio-xilinx",
358 .of_match_table = xgpio_of_match,
359 },
360 };
361
xgpio_init(void)362 static int __init xgpio_init(void)
363 {
364 return platform_driver_register(&xgpio_plat_driver);
365 }
366
367 subsys_initcall(xgpio_init);
368
xgpio_exit(void)369 static void __exit xgpio_exit(void)
370 {
371 platform_driver_unregister(&xgpio_plat_driver);
372 }
373 module_exit(xgpio_exit);
374
375 MODULE_AUTHOR("Xilinx, Inc.");
376 MODULE_DESCRIPTION("Xilinx GPIO driver");
377 MODULE_LICENSE("GPL");
378